Analog Design Engineer – Mixed-Signal SoC (Wireless Infrastructure)

Texas Instruments; Bengaluru; On-site; INR 1,500,000 - 3,000,000; Full time

Benefits offered by this job

Competitive pay

ESPP

Job summary

Texas Instruments in Bengaluru is seeking an Analog Design Engineer to join the Wireless Infrastructure Product Group. You will design integrated transceiver SoCs for telecom markets, crafting high-performance analog blocks and working across low-IF and RF architectures.

With 2–5 years of hands-on analog or mixed-signal IC design, you will translate system specs into transistor-level implementations, perform schematic capture, simulation, layout review, and post-silicon validation, contributing

Qualifications

• 2–5 years hands-on analog or mixed-signal IC design.
• Proficiency in transistor-level design and simulation.
• Experience with Cadence Virtuoso / Spectre or equivalent.
• Experience with advanced CMOS tech nodes (28nm/22nm).
• Strong knowledge of noise, linearity and layout sensitivity.
• Ability to translate system specs into circuit-level requirements.

Responsibilities

• Design precision analog circuits such as OTAs, references, bias circuits and signal chains.
• Architect analog baseband components focusing on noise and dynamic range.
• Design and optimize high-speed ADCs/DACs and data paths.
• Drive power efficiency through innovative analog architectures in 28nm CMOS.
• Perform full-cycle IC design: schematic capture, transistor-level sim, layout review, silicon bring-up, characterization.
• Collaborate with RF, digital, and systems teams for mixed-signal SoC integration.
• Contribute to post-silicon validation and patent filings.

Skills

Analog design

Mixed-signal IC design

Transistor-level design

Cadence Virtuoso

Noise analysis

CMOS 28/22nm

Post-layout verification

Schematic capture

Layout sensitivity

Education

B.E./B.Tech in ECE/EE

M.Tech in Microelectronics

Tools

Cadence Spectre

PEX/LVS/DRC

Mentor Graphics

Job description

What if the analog circuits you design today power the wireless networks billions of people depend on tomorrow?

At Texas Instruments, we engineer silicon that sits at the heart of global wireless infrastructure — and we need an exceptional Analog Design Engineer to help push the boundaries of what's possible.

Your transistors. Your architecture. Real silicon. Real-world scale.

About the Role

You'll join TI's Wireless Infrastructure Product Group — a world-class team designing integrated transceiver SoCs for 3G/4G/4.5G/AAS base station markets. You'll work across low-IF, zero-IF, and RF sampling architectures, crafting high-performance analog blocks that are deployed in telecom networks worldwide.

This is not a sustaining role. This is a design-from-scratch, innovate-from-day-one opportunity where your analog intuition becomes patented silicon.

Our team holds 250+ granted patents. Your next idea could be one of them.

• Design and develop precision analog circuits — OTAs, comparators, references, bias circuits, and signal chain blocks
• Architect and implement analog baseband components with focus on noise, linearity, and dynamic range
• Design and optimize high-speed data converters — pipelined ADCs, Sigma-Delta ADCs, and high-speed DACs
• Drive power efficiency innovation through differentiated analog architectures in 28nm CMOS
• Perform full-cycle IC design: schematic capture, transistor-level simulation, layout review, silicon bring-up, and characterization
• Collaborate with RF, digital, and systems teams on mixed-signal SoC integration
• Conduct post-silicon validation and debug to meet system-level performance targets
• Contribute to patent filings and internal technical publications for novel design innovations
• Translate system-level specifications into optimized analog circuit implementations

Required Skills

• 2–5 years of hands-on analog or mixed-signal IC design experience
• Strong fundamentals in analog circuit design — amplifiers, filters, references, bias, and signal chain
• Proficiency in transistor-level design and simulation using Cadence Virtuoso / Spectre or equivalent
• Experience with advanced CMOS technology nodes (28nm, 22nm, or similar)
• Solid understanding of noise analysis, linearity, matching, and layout sensitivity
• Ability to translate system specifications to circuit-level performance requirements
• Experience with post-layout verification — PEX, LVS, DRC
• Strong analytical mindset with attention to silicon-level detail

Preferred Qualifications

• Experience with ADC/DAC design or high-speed mixed-signal data paths
• Familiarity with transceiver SoC architectures for wireless communication
• Background in analog baseband or RF front-end signal chains
• Prior involvement in patent writing or IP generation
• M.Tech / M.S. in Microelectronics, VLSI, Analog Design, or Electrical Engineering
• Industry work in analog/mixed-signal IC design

Global Impact

Your analog designs power base stations across 100+ countries

Deep Tech Focus

Work on 28nm silicon with cutting-edge mixed-signal architectures

Innovation Culture

250+ patents filed — creative ideas are celebrated here

Career Acceleration

Clear growth from engineer to fellow level

Competitive Compensation

Industry-leading salary, bonuses, and ESPP