Analog Design Engineer

Acme Services; Hyderabad; On-site; INR 2,800,000 - 4,800,000; Full time

Job summary

Acme Services in Hyderabad seeks an experienced Analog Design Engineer to work on next‑generation high‑speed analog and mixed‑signal ICs. You will design cutting‑edge analog IPs and collaborate with global engineering teams to deliver high‑performance silicon solutions.

The role requires hands‑on transistor‑level design, simulations, parasitic extraction, and post‑layout verification for processes such as 16nm/28nm FinFET, and involves defining 10G/16Gbps PHY blocks using Cadence Virtuoso and

Qualifications

• Hands-on experience designing high-speed Analog/Mixed-Signal blocks (ADC, DAC, PLL, CDR, SerDes, Equalizers, TX/RX, Bandgap, LDO, Regulators, Oscillators, Amplifiers, Bias circuits).
• Design and development of Analog/Mixed-Signal macros in advanced processes (16nm, 28nm, FinFET).
• Transistor-level circuit design, simulation, parasitic extraction, post-layout verification, and design optimization.
• Design and integrate analog circuits for high-speed PHYs operating at 10G/16Gbps and above.
• Strong understanding of high-frequency analog design concepts, signal integrity, timing-critical circuits, and mixed-signal integration.
• Experience with Cadence Virtuoso, Spectre, and analog verification/physical implementation flows from circuit design to layout.
• Collaborate with layout, verification, and system architects to achieve first-pass silicon success.

Responsibilities

• Hands-on experience in design of high-speed Analog/Mixed-Signal blocks such as ADC, DAC, PLL, CDR, SerDes, Equalizers (CTLE/DFE/FIR), TX/RX circuits, Bandgap, LDO, Regulators, Oscillators, Amplifiers, and Bias circuits.
• Design and development of Analog/Mixed-Signal macros in advanced process technologies including 16nm, 28nm, and FinFET.
• Perform transistor-level circuit design, simulation, parasitic extraction, post-layout verification, and design optimization.
• Design and integrate analog circuits for high-speed communication PHYs operating at 10G/16Gbps and above.
• Strong understanding of high-frequency analog design concepts, signal integrity, timing-critical circuits, and mixed-signal integration.
• Hands-on experience with industry-standard EDA tools such as Cadence Virtuoso, Spectre, and analog verification/physical implementation flows from circuit design to layout.
• Collaborate with cross-functional teams including layout, verification, and system architects to achieve first-pass silicon success.

Skills

Analog Design

High-speed design

Mixed-Signal ICs

Transistor-level design

Tools

Cadence Virtuoso

Spectre

Physical verification

Job description

Hiring Experienced Analog Design Engineer - Leading Global Semiconductor Design Organization

Experience: 4 to 12 Years

We are looking for experienced Analog Design Engineers to work on next-generation high-speed Analog and Mixed-Signal ICs. This role offers an opportunity to design cutting-edge analog IPs, contribute to advanced semiconductor technologies (16nm/28nm/FinFET), and collaborate with global engineering teams to deliver high-performance silicon solutions.

Key Responsibilities:

• Hands-on experience in the design of high-speed Analog/Mixed-Signal blocks such as ADC, DAC, PLL, CDR, SerDes, Equalizers (CTLE/DFE/FIR), TX/RX circuits, Bandgap, LDO, Regulators, Oscillators, Amplifiers, and Bias circuits.
• Design and development of Analog/Mixed-Signal macros in advanced process technologies including 16nm, 28nm, and FinFET.
• Perform transistor-level circuit design, simulation, parasitic extraction, post-layout verification, and design optimization.
• Design and integrate analog circuits for high-speed communication PHYs operating at 10G/16Gbps and above.
• Strong understanding of high-frequency analog design concepts, signal integrity, timing-critical circuits, and mixed-signal integration.
• Hands-on experience with industry-standard EDA tools such as Cadence Virtuoso, Spectre, and analog verification/physical implementation flows from circuit design to layout.
• Collaborate with cross-functional teams including layout, verification, and system architects to achieve first-pass silicon success.