AMS Design Verification Lead – Mixed-Signal SoC | GaN

Texas Instruments; Bengaluru; On-site; INR 300,000 - 600,000; Full time

Job summary

Texas Instruments in Bengaluru seeks an experienced AMS DV Engineer/Lead to define and drive mixed-signal verification strategies for high-voltage power controller ICs. You will develop and maintain AMS testbenches, models, and system-level tests, while mentoring junior engineers and collaborating with design, firmware, and validation teams.

The role emphasizes ownership of verification deliverables, strong debugging, and a startup-like environment within TI’s global framework, based in

Qualifications

• 3–8 years of experience in mixed-signal design verification.
• Bachelor's/Master's degree in Electrical/Electronics Engineering.
• Strong fundamentals in mixed-signal blocks and top-level integration.
• Experience building SV/UVM testbenches from scratch.

Responsibilities

• Develop coverage-driven verification plans in collaboration with System and Design teams.
• Build SV/UVM-based testbenches, tests, checkers, and assertions.
• Perform behavioral modeling of analog blocks and system-level AMS tests.
• Mentor junior DV engineers and drive process improvements.
• Collaborate with DMS/SoC DV and Design teams for RTL verification support.

Skills

AMS DV engineering

SV/UVM testbenches

Cadence tools

Mixed-signal design

VerilogAMS

Python scripting

Testbench development

Debugging waveforms

Mentoring

Education

Bachelor's/Master's degree in Electrical/Electronics Engineering

Tools

Cadence Virtuoso

ADE Assembler

Xcelium

VIVA

SimVision

Cadence Spectre

SV RNM

VerilogAMS

Python

Perl/TCL

Job description

Build Something Extraordinary — Lead AMS Verification for World-Class High Voltage Power ICs

At Texas Instruments, our High Voltage Power (HVP) team develops some of the world's most advanced power solutions — AC/DC controllers, isolated DC/DC converters, GaN-integrated power stages, and modules capable of withstanding several hundreds of volts. Now, we're building this capability in Bangalore — and we're looking for an exceptional AMS DV Engineer/Lead to be part of this exciting journey from the ground up.

About the Opportunity

This is a rare startup-like opportunity within the safety of TI's global umbrella. You won't just join a team — you'll help build one. As part of TI's new HVP investment in India, you'll work in a dynamic, entrepreneurial environment while having access to TI's world-class tools, processes, and expertise.

We are looking for a talented AMS Design Verification Engineer/Lead to join the HVP team in Bangalore — responsible for developing and driving mixed-signal verification strategy, AMS testbenches, behavioral models, and SoC-level DV for high-voltage power controller ICs.

• Develop detailed coverage-driven verification plans in close collaboration with System and Design teams
• Perform behavioral modeling of analog blocks using SV RNM, VerilogAMS (wreal, electrical)
• Identify and develop system-level AMS tests to ensure bug-free silicon
• Independently develop SV/UVM-based testbenches, tests, checkers, assertions, and enhance with randomization and coverage
• Innovate and drive new and improved design verification methodologies; collaborate with EDA teams to upgrade tools and flows
• Interact with Test/Validation teams in post-silicon activities and customer debug/analysis
• Mentor and lead junior DV engineers — drive smart team initiatives and knowledge sharing
• Collaborate closely with the DMS/SoC DV team for RTL verification support as needed
• Maintain strong interactions with Digital Design, Firmware, Analog Design, and Applications teams
• Bachelor's/Master's degree in Electrical/Electronics Engineering
• 3–8 years of experience in mixed-signal design verification
• Strong fundamentals in mixed-signal designs — analog building blocks, digital design processes, top-level integration
• Proven experience in developing mixed-signal testbenches in SV/UVM from scratch
• Strong simulation debug capability — waveform analysis, schematic simulation debug, model debugging
• Ability to own design deliverables and schedules independently
• Strong communication, interpersonal, and team collaboration skills

Preferred Qualifications

• Proficiency with Cadence Mixed-Signal Design Environment — Virtuoso, ADE Assembler, Xcelium, VIVA, SimVision
• Expertise in Cadence Spectre simulation testbench development, regression flow, and debug
• Expertise in mixed-signal waveform review, debugging, and coverage analysis
• Experience in writing checkers, assertions, and monitors for top-level simulations
• Expertise in automation using Python, Perl, TCL, or shell scripting
• Knowledge of analog controllers for system testbench development and debug
• Prior experience as an AMS DV Lead for a project is a strong advantage

Why Texas Instruments HVP Bangalore?

Startup Energy: Join a new team being built from scratch — your contributions shape the culture and capability

Global Impact: Work on the world's largest HVP portfolio — AC/DC, DC/DC, GaN, and modules

Leadership: Lead, mentor, and grow junior DV engineers in a high-ownership environment

Innovation: Access to cutting-edge EDA tools, TI's global DV methodology, and Cadence mixed-signal flows

Technology: Work on GaN, high-voltage, and isolated power controller SoCs — one of the most demanding domains in semiconductors

Ready to Lead AMS DV at TI's Newest HVP Team in Bangalore?