About GlobalFoundries
GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets.
Title: 3D-IC Methodology Architect
Summary Of Role
This role describes an experienced 3D-IC methodology architect who will develop design & verification methodology, lead a technical team, drive standards across the organization, vendors, and technical focus on EMAG, thermal & package flows for multi-die systems. The successful candidate is required to have experience in leading teams, specifying and scoping methodology work items, collaborating with internal and external partners, and mentoring junior colleagues.
Essential Responsibilities
- Develop 3D-IC architecture, design & verification methodology, lead technical team, drive standards across organization, vendors, and technical focus on EMAG, thermal & package flows for multi-die systems.
- Lead methodology development for heterogeneous integration flows and provide training for internal design teams and customers.
- Partner with EDA vendors and internal PDK and design teams on EDA development flows.
- Work with product line management and marketing teams to scope customer requirements and adopt design flows in the market.
- Collaborate with cross‑geo, cross‑functional teams to understand requirements and communicate resolution in a timely manner.
- Mentor and train junior engineers to build effective software and automation features.
Other Responsibilities
- Perform all activities safely and responsibly, supporting all Environmental, Health, Safety & Security requirements and programs.
Required Qualifications
- Expertise in methodology design and model verification of RF, AMS, silicon photonics & packaging design for wafer-to-wafer, die-to-wafer applications.
- Expert knowledge of industry standard EDA tools and flows.
- Expert knowledge of analog, RF, AMS & digital design EDA tools and flows to drive integration level requirements.
- Bachelor of Engineering (B.E.) or equivalent degree in a related field from an accredited university.
- Minimum 15 years of relevant industry experience (B.E./B.Tech/Masters/PhD).
- More than 10 years of experience in relevant design or design enablement of IPs.
- Fluent in English (written & verbal).
- Proficient knowledge and experience with Unix environment.
- Excellent technical verbal and written communication skills and ability to work with cross‑functional teams.
- Strong problem‑solving skills, written & oral communication, teaming & interpersonal skills.
- Familiarity with standard engineering practices such as version control systems, configuration management, and regression processes.
Preferred Qualifications
- Advanced education (Bachelor’s, Master’s, or Ph.D.) in Electrical Engineering.
- Relevant industry experience in design flows and methodology development.
- Java coding skills and/or interest/coursework in generative AI.
- Project management skills, including the ability to innovate and execute solutions that matter and navigate ambiguity.
- Strong written and verbal communication skills.
- Strong planning and organizational skills.
If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com. Requests for accommodation will be considered on a case‑by‑case basis.
Information about our benefits can be found here: https://gf.com/about-us/careers/opportunities-asia