Junior Performance Software Engineer

Jobtailor; Limerick; On-site; EUR 65,000 - 95,000; Full time

Job summary

Jobtailor in Ireland seeks a performance engineer to optimize AI/HPC workloads on RISC‑V silicon and to profile, debug, and improve software stacks from compilers to runtimes.

You will work across simulators, emulators, and silicon environments, collaborating with hardware teams and customers to maximize efficiency and scalability.

Qualifications

• Requires a Bachelor's or Master's degree in a relevant field.
• 1–3 years of experience in the relevant field.
• Solid knowledge of computer architecture (CPU, cache, memory hierarchy, buses).
• Proven experience with performance optimization and profiling/analysis tools (Linux perf, iperf, lmbench, sysbench, flamegraphs, JMeter, LoadRunner, Gatling, Intel VTUNE, ARM SPE, etc.).
• Solid knowledge of low‑level development languages (C, C++, Rust, etc.).
• Experience with assembly language on any architecture.
• Experience with performance benchmarks (CoreMark, FPMark, LMBench, Stream, SPEC CPU, SPEC INT, graph500, CORAL, HPGMG, CoMD, Linpack, SuiteSparse Matrix Collection, MLPERF, ResNet, BERT, etc.).
• Solid understanding of operating systems, databases, networking, and cloud technologies.
• Strong problem‑solving skills with the ability to troubleshoot and identify complex issues.
• Experience with bare‑metal development for embedded systems and microcontrollers.
• Experience with standard tools for source control (git), continuous integration, and task management (Jira).
• Experience with machine learning and/or HPC performance optimization.
• Experience with Fortran.
• Experience with RISC‑V development at the assembly‑language level.
• Experience with statistical analysis.
• Experience with emulators and simulators (Qemu, Gem5, Spike).
• Experience in containerized environments (Docker, Kubernetes).
• Experience with hypervisor technology (KVM, Xen).
• Experience with open‑source software development.

Responsibilities

• Make independent technical contributions to help the team deliver its commitments.
• Optimize AI, HPC, and other workloads and benchmarks for our RISC‑V silicon with vector extensions.
• Identify bottlenecks via workload characterization and drive implementation of solutions.
• Decompose applications and understand how they run on the underlying hardware.
• Understand performance at a system level, from CPU, memory, storage, and power utilization.
• Profile and optimize on pre‑silicon environments (simulators, emulators, FPGAs) and on silicon.
• Troubleshoot and conduct root‑cause analysis to resolve performance issues.
• Optimize HPC and AI libraries and runtimes.
• Work with customers to optimize their critical workloads for our architecture.
• Contribute to instrumentation of performance and power at the operating‑system level.
• Integrate with CI/CD to automate performance benchmarking.
• Present findings to senior technical leaders and at industry conferences.
• Contribute upstream where appropriate.
• Interact with colleagues across projects to unblock issues or reach consensus on technical topics.
• Collaborate with hardware teams, influencing hardware/software co‑design.
• Collaborate with teams developing compilers, firmware, AI stacks, middleware, and contribute as necessary.
• Collaborate through code reviews, bug triaging, design documents, and other shared responsibilities such as CI failure triaging, documentation, and code fixes.

Skills

Low-level development languages suchas

Performance optimization

RISC‑V development

Assembly language

Performance benchmarks

Machine learning optimization

Emulators and simulators

Open‑source software development

Containerized environments

Hypervisor technology

Education

Bachelor's or Master's degree in a relevant field

Tools

Linux perf

iperf

lmbench

flamegraphs

Qemu

Gem5

Spike

Job description

Responsibilities

• Make independent technical contributions to help the team deliver its commitments.
• Optimize AI, HPC, and other workloads and benchmarks for our RISC‑V silicon with vector extensions.
• Identify bottlenecks via workload characterization and drive implementation of solutions.
• Decompose applications and understand how they run on the underlying hardware.
• Understand performance at a system level, from CPU, memory, storage, and power utilization.
• Profile and optimize on pre‑silicon environments (simulators, emulators, FPGAs) and on silicon.
• Troubleshoot and conduct root‑cause analysis to resolve performance issues.
• Optimize HPC and AI libraries and runtimes.
• Work with customers to optimize their critical workloads for our architecture.
• Contribute to instrumentation of performance and power at the operating‑system level.
• Integrate with CI/CD to automate performance benchmarking.
• Present findings to senior technical leaders and at industry conferences.
• Contribute upstream where appropriate.
• Interact with colleagues across projects to unblock issues or reach consensus on technical topics.
• Collaborate with hardware teams, influencing hardware/software co‑design.
• Collaborate with teams developing compilers, firmware, AI stacks, middleware, and contribute as necessary.
• Collaborate through code reviews, bug triaging, design documents, and other shared responsibilities such as CI failure triaging, documentation, and code fixes.

Qualifications

• Bachelor's or Master's degree in a relevant field.
• 1–3 years of experience in the relevant field.
• Solid knowledge of computer architecture (CPU, cache, memory hierarchy, buses, etc.).
• Proven experience with performance optimization and profiling/analysis tools (Linux perf, iperf, lmbench, sysbench, flamegraphs, JMeter, LoadRunner, Gatling, Intel VTUNE, ARM SPE, etc.).
• Solid knowledge of low‑level development languages (C, C++, Rust, etc.).
• Experience with assembly language on any architecture.
• Experience with performance benchmarks (CoreMark, FPMark, LMBench, Stream, SPEC CPU, SPEC INT, graph500, CORAL, HPGMG, CoMD, Linpack, SuiteSparse Matrix Collection, MLPERF, ResNet, BERT, etc.).
• Solid understanding of operating systems, databases, networking, and cloud technologies.
• Strong problem‑solving skills with the ability to troubleshoot and identify complex issues.
• Experience with bare‑metal development for embedded systems and microcontrollers.
• Experience with standard tools for source control (git), continuous integration, and task management (Jira).
• Experience with machine learning and/or HPC performance optimization.
• Experience with Fortran.
• Experience with RISC‑V development at the assembly‑language level.
• Experience with statistical analysis.
• Experience with emulators and simulators (Qemu, Gem5, Spike).
• Experience in containerized environments (Docker, Kubernetes).
• Experience with hypervisor technology (KVM, Xen).
• Experience with open‑source software development.

Hard Skills

• C
• C++
• Rust
• Assembly Language
• Performance Benchmarking
• Bare Metal Development
• Statistical Analysis
• Machine Learning Optimization
• RISC‑V Development
• Emulators and Simulators

Soft Skills

• Problem‑Solving
• Collaboration
• Communication