Digital Design Verification, Principal Engineer

Synopsys, Inc.; Dublin; Hybrid; EUR 120,000 - 180,000; Full time

Benefits offered by this job

Health benefits

Total rewards package

Job summary

Synopsys, Inc. in Ireland seeks a senior verification engineer with 12+ years of IP/SoC verification experience to lead robust verification infrastructures and mentor a global team.

You will apply AI techniques to accelerate design verification, implement unified verification flows with VCS, Verdi, and VIPs, and build scalable verification infrastructures for diverse IP/SoC projects. Join the COE to shape verification methodology and drive technical excellence across global teams.

Qualifications

• 12+ years in IP/SoC verification with hands-on contributions.
• Experience with leading verification flows and validation for complex digital designs.
• Strong programming/scripting in SystemVerilog, UVM, Tcl, Python or similar languages.

Responsibilities

• Apply AI techniques to accelerate design verification and generate verification collateral.
• Implement unified verification flows for Synopsys digital IP products using VCS, Verdi, and related tools.
• Build scalable verification infrastructures to support diverse IP/SoC projects.
• Partner with global teams to propagate best verification methodologies and standards.
• Mentor junior engineers and drive high-impact assignments to timely delivery.
• Collaborate with tool development teams to evolve products and optimize workflows.

Skills

IP/SoC verification

SystemVerilog

UVM

Python

Tcl

Agentic AI

Cursor

VS Code co-pilot

Leadership

Mentoring

Communication

Education

Bachelor’s or Master’s degree in electrical/electronics/computer engineering

Tools

VCS

Verdi

VMS Execution Manager

Verdi Planner (HVP)

VIPs

Job description

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a visionary and highly experienced engineering professional, passionate about verification and digital design methodologies. With at least 10 years of solid experience in IP and SoC verification, you have consistently demonstrated technical excellence and leadership in your career. You thrive in challenging environments and are adept at architecting robust verification infrastructures from the ground up, particularly within the EDA ecosystem.

What You’ll Be Doing:

• Applying AI techniques to accelerate design verification – leveraging internal and/or external agentic AI tools to generate verification plan, testcases, coverage and debug collaterals
• Implementing reference and unified verification flows for Synopsys digital IP products using leading EDA tools such as VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs.
• Building robust, scalable verification infrastructures from the ground up to support diverse and complex IP and SoC projects.
• Partnering with global engineering teams to define, document, and propagate best-in-class verification methodologies and standards.
• Leading and mentoring junior engineers, fostering a culture of technical growth, innovation, and collaboration within the team.
• Driving technical initiatives and independently managing high-impact assignments, ensuring timely and high-quality deliverables.
• Collaborating closely with tool development teams to influence product evolution and optimize verification workflows for maximum efficiency.
• Supporting customers and internal stakeholders by troubleshooting, optimizing, and refining verification processes and flows.

What You’ll Need

• Minimum 12+ years of hands-on experience in IP/SoC verification, with a proven track record of hands-on technical contributions.
• Good understanding of Agentic AI technologies specifically Cursor and/or VS Code co-pilot.
• Passion to learn Agentic AI mechanisms and apply them for design verification.
• Familiarity with Synopsys verification tools such as VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs.
• Demonstrated ability to validate verification flows and infrastructure for complex digital designs.
• Exposure to Agentic AI EDA tools will be a big plus.
• Solid programming and scripting skills (SystemVerilog, UVM, Tcl, Python or similar languages).
• Bachelor’s or Master’s degree in electrical/Electronics/Computer engineering
• Experience with multi-tasking and managing technical projects independently.
• Ability to document, communicate, and propagate technical methodologies across global teams.

The Impact You Will Have

• Elevate Synopsys’ digital IP verification capabilities by delivering robust, unified, and scalable methodology solutions.
• Accelerate time-to-market for high-performance silicon products by streamlining and standardizing verification processes.
• Empower global verification teams with best-in-class flows, tools, and practices, driving consistent project success.
• Shape the verification strategy for next-generation Synopsys IP and SoC offerings, directly influencing product quality and customer satisfaction.
• Mentor and develop the next wave of verification engineers, fostering a culture of learning and technical excellence.
• Contribute to the evolution of Synopsys’ EDA tool ecosystem by providing critical feedback and championing innovative solutions.
• Enhance Synopsys’ leadership position in the semiconductor industry through continuous improvement and adoption of cutting‑edge verification methodologies.

Who You Are

• Innovative problem solver who thrives in dynamic, fast-paced environments.
• Excellent communicator, able to distill complex technical topics for diverse audiences.
• Natural mentor and team player, passionate about knowledge‑sharing and team development.
• Strategic thinker with a keen eye for detail and a commitment to quality.
• Self‑motivated leader who takes initiative and drives projects to successful completion.
• Adaptable, resilient, and eager to learn and grow alongside industry leaders.

The Team You’ll Be A Part Of

You will be a core member of the newly established Digital IP Verification Methodology (COE) team, a group of forward-thinking engineers dedicated to advancing verification excellence at Synopsys. The team collaborates across global sites, driving innovation in methodology, tool integration, and best practices. Together, you will shape the future of digital IP verification, enabling Synopsys and its customers to deliver world‑class silicon solutions.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non‑monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.