Digital Design Member of Technical Staff (MTS)

Onsemi

Cork

On-site

EUR 80,000 - 120,000

Full time

14 days+
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Job summary

A leading semiconductor company in Cork is seeking a Senior Digital Design Member of Technical Staff to architect and deliver digital controller IP for power management systems. This hands-on role involves collaboration with cross-functional teams and mentoring junior engineers. Ideal candidates will have over 15 years of experience in digital design and a strong understanding of automotive functional safety. The position requires expertise in SystemVerilog and is geared towards pushing the envelope in automotive and industrial applications.

Qualifications

  • 15+ years of hands-on digital design experience, primarily in ASIC or SoC development.
  • Proven experience delivering automotive IP with functional safety requirements.
  • Strong background designing digital controllers for analog blocks.

Responsibilities

  • Architect, design, and implement digital system controllers for power and clock management.
  • Drive IP delivery from architecture through RTL, verification, and integration.
  • Ensure designs meet automotive functional safety requirements.

Skills

Digital Design

Education

Masters Degree

Tools

SystemVerilog
JIRA
JAMA

Job description

Digital Design Member of Technical Staff (MTS)

Cork, Co. Cork, Ireland

Job Description

About onsemi

onsemi is driving innovation in power, sensing, and automotive semiconductor solutions to enable a more sustainable future. Our Treo™ platform underpins next-generation intelligent power systems for automotive and industrial markets, emphasizing safety, reliability, and scalability.

Role Overview

We are seeking a senior Digital Design Member of Technical Staff (MTS) to lead and deliver digital controller IP for power, clock, and error management subsystems within the onsemi Treo™ platform. This role is a hands‑on technical leadership position, focused on architecting, designing, integrating, and evolving complex digital IP that tightly interfaces with analog and mixed‑signal blocks in automotive‑grade SoCs.

The successful candidate will bring deep experience in automotive functional safety, digital‑analog co‑design, and system‑level integration, while also serving as a technical mentor and thought leader within the Cork design organization.

Responsibilities

Key Responsibilities

  • Architect, design, and implement digital system controllers for:
    • Power management
    • Clock management
    • Error detection, reporting, and mitigation subsystems
  • Develop robust digital IP that controls and interacts closely with analog and mixed‑signal blocks.
  • Own IP delivery from architecture through RTL, verification, integration, and silicon bring‑up support.
  • Drive and support digital‑on‑top product integration flows, including:
    • IP integration into SoC environments
    • Clocking, reset, power domain, and safety integration
  • Ensure designs meet automotive functional safety requirements (e.g., ISO 26262 concepts such as ASIL, fault coverage, diagnostic mechanisms).
  • Collaborate cross‑functionally with:
    • Analog design
    • Verification
    • Physical design
    • Systems, safety, and product engineering teams
  • Define and evolve IP roadmaps aligned with:
    • Platform strategy
    • Product requirements
    • Long‑term business objectives
  • Mentor and technically guide junior and mid‑level engineers, promoting best practices in design, documentation, and review culture.
  • Contribute to continuous improvement of:
    • Design methodologies
    • Verification strategies
    • Automation and productivity tools
  • Stay technically curious and engaged with emerging AI/ML applications in digital design, including their potential impact on RTL development, verification, and productivity.
Qualifications

Required Qualifications

  • 15+ years of hands‑on digital design experience, primarily in ASIC or SoC development.
  • Proven experience delivering automotive IP with functional safety requirements.
  • Strong background designing digital controllers for analog blocks (e.g., power regulators, PLLs, sensors, clocking systems).
  • Deep understanding of system‑level digital integration, including:
    • Power and clock domain management
    • Reset strategies
    • Error handling and safety mechanisms
  • Solid experience with RTL design (SystemVerilog).
  • Working knowledge of constrained‑random verification methodologies, including SystemVerilog and UVM.
  • Demonstrated ability to work effectively as a senior individual contributor, owning complex technical problems end to end.
  • Strong communication skills and a demonstrated willingness to mentor junior engineers.

Preferred / Plus Qualifications

  • Experience with automotive safety standards such as ISO 26262 (concept, system, or IP‑level application).
  • Working knowledge of JIRA for task tracking and JAMA for requirements management.
  • Exposure to safety diagnostics, fault injection, or safety verification techniques.
  • Experience contributing to platform‑level IP strategies or multi‑generation roadmap planning.
  • Familiarity with low‑power design techniques and power‑aware verification.
Required Skills
  • Digital Design
About Us

onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end‑markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

More details about our company benefits can be found here:

We are committed to sourcing, attracting, and hiring high‑performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.

Job Info
  • Job Identification 2505053
  • Job Category Engineering
  • Posting Date 03/26/2026, 12:31 PM
  • Degree Level Masters
  • Job Schedule Full time
  • Job Shift Day
  • Locations Suite 2, Building 6800, Cork, T12 CDF7, IE
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