ASIC Digital Design Engineer

TN Ireland; Galway; On-site; EUR 50,000 - 90,000; Full time

Job summary

An established industry player is seeking a Digital Design Engineer to join their elite team of video experts. In this pivotal role, you will be responsible for designing and verifying cutting-edge Video IP cores, ensuring they meet the highest standards of performance. Your expertise in Verilog, ASIC design, and video processing will be crucial as you develop innovative solutions that support all major video standards, including HEVC and AV1. This is a fantastic opportunity for a collaborative team player who is passionate about technology and eager to make a significant impact in the field of video engineering.

Qualifications

• Degree in Electronics Engineering or related discipline.
• Knowledge of Front-End design for ASIC and video processing.

Responsibilities

• Design and verify Video IP cores for high-performance applications.
• Develop Video compression and decompression IP cores in RTL.

Skills

Verilog

VHDL

CAD tools

ASIC design flows

C/C++

scripting languages

video compression algorithms

signal processing

Education

BEng in Electronics Engineering

MEng in Electronics Engineering

MS in Electronics Engineering

Tools

CAD tools

Job description

The Digital Design Engineer will be responsible for the design and verification of our Video IP cores. Part of a team of top-class industry video experts, you will develop high-performance Video compression and decompression IP cores in RTL supporting all video standards including HEVC, AV1, and VVC.

Qualifications

BEng, MEng, or MS in Electronics Engineering or related discipline. The ideal candidate has knowledge of Front-End design for ASIC, video processing/coding, or signal processing, fluent English communication skills, and must be a great team player.

Skills/Experience

1. Verilog (and/or VHDL) language proficiency.
2. Excellent skills in CAD tools and ASIC design flows (modeling, design, simulation, synthesis, verification, etc.).
3. Knowledge of C/C++, scripting languages, and optimization of architectures and micro-architectures at HW/RTL level is required.
4. Understanding of video compression/decoding algorithms (for example: H.264, H.265) is a plus.