CUDA Kernel Engineer for Low-Latency Inference

SIG; Hong Kong; On-site; HKD 900,000 - 1,300,000; Full time

Job summary

Susquehanna is seeking a GPU Performance Engineer to build highly optimized CUDA kernels for low-latency inference. This role targets workloads where standard libraries don’t fully exploit model structures, enabling custom kernels and memory layouts to deliver meaningful gains.

You will partner with quantitative researchers to identify bottlenecks, translate math into production-grade GPU code, and push latency and throughput to meet demanding trading workloads.

Qualifications

• Proven ability to write and optimize CUDA kernels.
• Strong C/C++ programming experience.
• Deep understanding of GPU architecture and memory hierarchy.
• Ability to reason about numerical stability and performance tradeoffs.
• Experience with low-level systems.

Responsibilities

• Design, implement, and optimize custom CUDA kernels for latency-critical inference workloads.
• Develop fine-grained GPU implementations tailored to specific model structures.
• Analyze models to identify bottlenecks and opportunities for parallelization.
• Collaborate with researchers to translate models into high-performance pipelines.
• Optimize end-to-end inference performance through tuning and memory layouts.
• Profile and benchmark GPU performance.
• Improve latency and throughput in production systems.
• Contribute to GPU architecture decisions and performance best practices.

Skills

CUDA kernels

C/C++

GPU architecture

Numerical stability

Low-level systems

Education

PhD in Mathematics, Physics, Computer Science, Engineering, or related quantitative field

Tools

ONNX Runtime

TensorRT

Triton

TVM

PTX-level behavior

Job description

Susquehanna is seeking a GPU Performance Engineer to build highly optimized CUDA kernels for low-latency inference. This role targets workloads where standard libraries don’t fully exploit model structures, enabling custom kernels and memory layouts to deliver meaningful gains.

You will partner with quantitative researchers to identify bottlenecks, translate math into production-grade GPU code, and push latency and throughput to meet demanding trading workloads.