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GE Vernova in the United Kingdom seeks a Verification and Validation Engineer to lead testing of HVDC control software and ensure correct functionality. You will design test specifications, analyze gaps, and support lab setup, including RTDS and RSCAD models, to verify performance and reliability.
Excellent communication in English and knowledge of HVDC systems (LCC/VSC/SVC) and related standards will help deliver robust products and reduce risk across the project lifecycle.
Main duties and responsibilities will include.
Qualifications / Essential Requirements
Engineering degree or equivalent including power systems and power electronics subjects or proven equivalent knowledge and experience in HVDC business.
Successfully completed vocational training with ideally some proven experience in the position of Verification Engineer in High Voltage field, preferably experience as a Control & Protection design Engineer. Good knowledge of overall 400kV substation, HVDC system (LCC/VSC/SVC) including control and protection system is essential.
Knowledge and experience of developing and working with RSCAD models is essential.
Knowledge of Overall HVDC System Operational behaviour.
Strong communication skills with a fluency in English language.
Knowledge of Microsoft Office Word and Excel is required, and Microsoft project would be beneficial.
Knowledge of Fault Recorder (TFR) systems is preferred.
Experience on MATCAD, PSCAD, PSS/E and MATLAB SIMULINK, EMTP-RV, Digsilent etc will added advantage.
Knowledge of applicable electrical standards such as IEC 61850, IEC 62351, IEC 12207, IEEE 15288, IEC 25010, IEC 27032, NERC/CIP will be an added advantage.
Relocation Assistance Provided: No