Staff Engineer, Analogue Design

Qualcomm; Cambridge; On-site; GBP 50,000 - 80,000; Full time

Job summary

A leading company in connectivity solutions is seeking a Staff Engineer in Analogue Design. This role involves designing and verifying complex power-management blocks for advanced chip technologies. Candidates should have extensive experience in analogue design and power management, with proficiency in relevant design tools. Join a dynamic team to contribute to innovative solutions in voice and music technology.

Qualifications

• 5+ years of work experience in analogue design.
• Design experience of key power management IPs like SMPS and LDOs.
• Ability to coordinate with different groups.

Responsibilities

• Define architecture for complex power-management blocks.
• Deliver fully verified blocks and solve complex problems.
• Ensure quality of solutions and timely delivery.

Skills

Analogue design

Problem-solving

Interpersonal skills

Communication skills

Tools

Cadence

Mentor

Matlab

Job description

Job Overview - Dept Description and Job Duties:

The role of a Staff Engineer, Analogue Design is to act as a key contributor to the design, implementation and verification of the complex power-management blocks and subsystems of Qualcomm’s range of connectivity, Voice and Music chips. In addition to contributing to the specification, design and verification of the blocks using appropriate tools, a Staff Engineer will contribute to the macro level architectures and the definition of new features and market driven enhancements for Qualcomm’s chips.

Key Responsibilities:

• Acts as a key contributor in a complex environment;
• Definition of the architecture for the complex Power-management blocks, plan and execute the development of the blocks and providing the necessary documentation to different departments for the characterization of the block.
• Responsible for the delivering the fully verified blocks and may get involved in the verification of power-management subsystems within the Analogue section of a chip;
• Solves complex problems in a tightly constrained environment;
• Fully competent in Analogue design for complex sub-cells and small subsystems;
• Keeps abreast of new developments and is technical expert in the design of analogue sub-cells;
• Ensures quality of the solution; works with macro lead to ensure timely delivery of subsystems

Minimum Experience:

Candidate should have:

• 5+ year of work experience
• Design experience of Key Power management IPs like SMPS, LDOs
• Good understanding of the analog design.
• Ability to coordinate with different groups and define the requirements
• Experience in the design of various power-management blocks

Preferred Experience:

• Fully competent in Analogue design and verification techniques
• Fully competent in the use of Cadence and Mentor analogue design and verification tools
• Knowledge of Matlab and other system design tools for defining the architecture and specification of the blocks is a plus.
• Good team player.
• Good interpersonal and communication skills

*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

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