Snr System Performance Architect

microTECH Global Limited; Cambridgeshire and Peterborough; On-site; GBP 60,000 - 100,000; Full time

Job summary

An established industry player in the CPU domain is seeking a talented Architect to drive innovation in system performance modeling and simulation. This role involves optimizing software and hardware collaboration, identifying performance bottlenecks, and enhancing chip design through detailed analysis. You will lead the development of performance models and benchmarks while guiding CPU microarchitecture design for superior product performance and energy efficiency. Join a forward-thinking team where your contributions will significantly impact the future of computing technology.

Qualifications

• Master's degree or higher in IC, Microelectronics, or Computer Science required.
• Proficiency in system performance modeling and simulation tools necessary.

Responsibilities

• Perform system performance modeling and simulation for CPU microarchitecture.
• Develop performance models and lead gem5 emulator maintenance.

Skills

System Performance Modeling

Simulation Tools

Software-Hardware Optimization

Microarchitecture Design

Benchmark Construction

Education

Master's degree in IC, Microelectronics, or related fields

Tools

gem5

QEMU

Job description

A leading innovator in the CPU domain is searching for a dedicated and driven Architect to bring their vision and expertise to system performance modeling and simulation, and to be a key influence and driver in CPU microarchitecture innovation.

Key Tasks:

1. Perform system performance modeling and simulation, ensuring the collaborative optimization of software and hardware.
2. Identify program execution hotspots and microarchitecture bottlenecks through top-down analysis of computing load requirements and bottlenecks in key service scenarios, guiding software architecture optimization and hardware acceleration implementation.
3. Develop performance models for the software load and hardware/chip architecture of terminal systems, creating evaluation models for user experience performance indicators based on software load and hardware specifications, and supporting chip and product planning performance evaluations.
4. Lead the development and maintenance of the gem5 emulator to evaluate and optimize system performance in detail.
5. Build benchmarks tailored to terminal software characteristics and guide CPU microarchitecture design, vertically optimizing soft and hard cores to enhance product performance and energy efficiency competitiveness.

Key expertise required:

1. Master's degree or higher in IC, Microelectronics, Computer Science, Communication, or related fields. Relevant experience with practical project work in chip performance modeling, simulation, and collaborative software-hardware optimization.
2. Proficiency in system performance modeling and simulation tools (e.g., gem5, QEMU), with the ability to develop and maintain gem5 simulators.
3. Deep understanding of the chip design process, with the capability to analyze and optimize chip performance.
4. Expertise in software and hardware co-design methodologies to optimize system-level performance.
5. Strong knowledge of benchmark construction and microarchitecture design, with the ability to guide CPU microarchitecture optimization.

Please reach out to Emma Feely via email at [e-mail] for further details.