Silicon Logical Design Engineer: RTL & IP Integration

Graphcore; West of England; On-site; GBP 75,000 - 110,000; Full time

Benefits offered by this job

Flexible working

Private medical insurance

Dental plan

Pension (matched up to 5%)

Life assurance

Parental leave

Employee assistance programme

Job summary

Graphcore in Bristol, UK, is seeking a Silicon Logical Design Engineer to contribute to micro-architecture specifications and RTL for Graphcore chips, working closely with the Silicon team to meet delivery objectives.

You will integrate IP and subsystems into top-level SoCs, perform synthesis and timing checks, support verification and physical design, and help maintain robust design flows. A degree in CS/Engineering and strong SystemVerilog or VHDL skills are required.

Qualifications

• Degree in Computer Science, Engineering or a related subject.
• Digital design experience in a relevant industry.
• Be highly motivated, a self-starter, and a team player.
• Ability to work across teams and finding solutions to problems.
• Ability to solve design issues through programming, e.g. Python, Tcl.
• Strong competency in SystemVerilog or VHDL.
• Knowledge of digital design flows.
• Capable of managing time and priorities.

Responsibilities

• Integrate IP and subsystems into top-level SoC designs.
• Develop and maintain build and configuration environments.
• Perform synthesis, linting, CDC/RDC, and timing checks at the SoC level.
• Support verification and physical design teams through clean interface hand-offs.
• Debug and resolve integration-related issues across multiple hierarchies.
• Contribute to the continuous improvement of integration flows and automation.
• Producing high quality microarchitecture and other documentation.
• Ensure good communication between sites to maintain consistent working practices.

Skills

Digital design

SystemVerilog

VHDL

Python

Tcl

Team player

Cross-team work

Problem solving

Education

Degree in Computer Science or Engineering

Relevant subject

Tools

Synthesis tools

Job description

Graphcore in Bristol, UK, is seeking a Silicon Logical Design Engineer to contribute to micro-architecture specifications and RTL for Graphcore chips, working closely with the Silicon team to meet delivery objectives.

You will integrate IP and subsystems into top-level SoCs, perform synthesis and timing checks, support verification and physical design, and help maintain robust design flows. A degree in CS/Engineering and strong SystemVerilog or VHDL skills are required.