Senior Verification Engineer

Fractile; London Borough of Southwark; On-site; GBP 70,000 - 110,000; Full time

Job summary

Fractile seeks a Silicon Verification Engineer in London or Bristol. You will lead RTL verification, collaborate across modelling, architecture, and software teams, and drive testbenches for high-performance AI hardware projects.

Ideal candidates have 6+ years in verification, strong SystemVerilog/UVM skills, and fluency with waveform debugging and open-source tools like Cocotb, Verilator, and Icarus Verilog.

Qualifications

• 6+ years of hands-on verification experience in hardware or ML/AI accelerators.
• Proficient with SystemVerilog/UVM and RTL debugging.
• Able to read and debug RTL and waveforms.

Responsibilities

• Own RTL verification from specification to tape-out quality.
• Collaborate with modeling, architecture, and software teams.
• Develop testbenches and coverage for data-path blocks.

Skills

Python

SystemVerilog

UVM

Waveform debugging

Tools

Cocotb

Verilator

Icarus Verilog

Formal verification

Job description

About Fractile

Fractile was founded in 2022 on the bet that, eventually, the world's most capable AI systems would be limited in their impact by the time taken to produce useful outputs. We bet everything on the logical conclusion: that the only way to truly unlock this latent value, to make speed viable at scale, was to radically re-invent the hardware that we run our frontier AI models on. Ever since, we have been building chips and systems that tackle this problem: how to efficiently generate output at thousands of tokens per second, while handling the complexity and capacity challenges of operating large models at very long contexts. The workloads that push to the limits of the current frontier are already transformational; it is the technical and economic limits on inference speed that are constraining progress. The defining work of the 21st century will be marked by the engine of inference delivering immense and diffuse chains of intellectual inquiry, in drug discovery, in software engineering, in materials discovery, in any field where progress is driven by deep reasoning and intelligence to resolve complex problems. Our ideal candidate could have 6+ years' experience. This is a unique opportunity to accelerate your development, working with an experienced and collaborative team and gaining exposure to a broad range of disciplines. At Fractile, we value ideas from everyone, regardless of title or tenure, and we believe the best engineering happens when people share, question, and learn together. You'll be joining a culture where your curiosity is encouraged, your input matters, and there's real room to grow. As a Silicon Verification Engineer, you will be based in either our Bristol or London office in the UK. We are looking for you to take an active role in building world-class ML/AI IC products for scale-out to data centre applications. You will be ambitious and have a proven track record in working in high-performance delivery organisations in the discipline of pre-silicon RTL verification. We are looking for someone who is passionate about verification - not someone content to go through the motions, but rather looking to push the field further forwards. If you get excited about bringing software concepts to hardware workflows, and enjoy improving established practices to increase tape-out quality and bring down costs, then this is the role for you. Our preferred candidate will be comfortable working alongside colleagues across the organisation from disciplines such as modelling, system architecture and RTL design. You'll be frequently collaborating to ensure our RTL releases are of the highest functional quality, and that the entire company shares the same definition of a functionally correct product. This means contributing to discussions around specification, architecture and the workflows surrounding them. You'll be a key contributor to our highly disruptive and ambitious product.

We look for engineers with the following mindset:

• Software mindset for solving hardware problems
• The desire to be in a high impact role in a small team
• A disrupter of the "status quo" of hardware development
• Eagerness to contribute to and improve working practices and help build connections between hardware and software teams
• Detail-focused, with rigour as the baseline for all work
• Humility, desire to learn
• Happy to be part of a fast-paced, open and collaborative environment

Required skills and experience:

• Strong software skills Python (or another object oriented language e.g C++)
• Understanding of digital hardware concepts
• Ability to read and debug RTL in SystemVerilog
• Familiarity with debugging waveforms
• Candidates with a UVM or a strong software background are encouraged to apply even without an RTL background

Desirable skills and experience:

• Pre-silicon RTL verification
• Verification planning and execution from specification
• Building testbenches
• Stimulus creation
• Functional modelling of hardware blocks
• Checker creation
• Coverage definition/closure
• Transaction-Level Modelling
• Whether in UVM, SystemC or another methodology
• SystemVerilog Assertions (SVA)
• Software fluency in multiple languages
• Open source tools for silicon development Cocotb (used for all our testbench collateral), Verilator, Icarus Verilog
• Commercial EDA tools Formal verification

How we work

Ownership and execution: you will have full agency to drive your work forward Rapid iteration: we all work directly with top leadership to move from idea to hardware on ambitious timelines Full-stack engagement: hardware, software, silicon, and modelling teams all work closely together to create a product with generational impact Optimistic and pragmatic: we possess the will to w