Verification Engineer

Fractile; Bristol, Greater London; In loco; GBP 40.000 - 55.000; Tempo pieno

Descrizione del lavoro

A pioneering AI company based in the UK is looking for a Silicon Verification Engineer to join their innovative team. This role involves collaborating across multiple disciplines to ensure the highest standards of functional quality in RTL releases. Candidates should have strong software skills, preferably in Python, and a foundational understanding of digital hardware concepts. This position offers the opportunity to work in a dynamic and supportive environment, pushing the boundaries of hardware and software integration.

Competenze

• Strong software skills, preferably in Python.
• Understanding of digital hardware concepts.
• Ability to read and debug RTL in SystemVerilog.

Mansioni

• Contribute to discussions around specification and architecture.
• Build world-class ML/AI IC products for scale-out applications.
• Ensure RTL releases meet high standards of functional quality.

Conoscenze

Strong software skills

Ability to read and debug RTL in SystemVerilog

Familiarity with debugging waveforms

Verification planning and execution from specification

Building testbenches

Strumenti

Cocotb

Verilator

Icarus Verilog

Descrizione del lavoro

Fractile’s mission is to enable a new chapter in the AI revolution. We’re pioneering AI innovation where hardware and software join to create something truly extraordinary, unlocking the power of the world’s largest language models with speed increases of x100. Our team is rapidly expanding, and we're searching for visionary engineers, scientists, and thinkers who share our passion for pushing boundaries and redefining what's possible. If you're ready to join a dynamic group of innovators shaping AI's future, we want to hear from you!

Our ideal candidate could have 0-3 years’ experience, including recent graduates. This is a unique opportunity to accelerate your development, working with an experienced and collaborative team and gaining exposure to a broad range of disciplines. At Fractile, we value ideas from everyone, regardless of title or tenure, and we believe the best engineering happens when people share, question, and learn together. You’ll be joining a culture where your curiosity is encouraged, your input matters, and there’s real room to grow.

As a Silicon Verification Engineer, you will be reporting to the Director of Frontend Silicon and will be based in either our Bristol or London office in the UK. We are looking for you to take an active role in building world‑class ML/AI IC products for scale‑out to data centre applications. We are looking for someone who is passionate about verification – not someone content to go through the motions, but rather looking to push the field further forwards. If you get excited about bringing software concepts to hardware workflows, and enjoy improving established practices to increase tape‑out quality and bring down costs, then this is the role for you.

You’ll work closely with colleagues across modelling, system architecture, and RTL design to ensure our RTL releases meet the highest standards of functional quality. That includes contributing to discussions around specification, architecture, and the workflows that connect them. Your work will be integral to delivering our highly disruptive and ambitious product.

We look for engineers with the following mindset:

• Software mindset for solving hardware problems
• The desire to be in a high impact role in a small team
• A disrupter of the “status quo” of hardware development
• Eagerness to contribute to and improve working practices and help build connections between hardware and software teams
• Detail‑focused, with rigour as the baseline for all work
• Humility, desire to learn
• Happy to be part of a fast‑paced, open and collaborative environment

Required skills and experience:

• Strong software skills
  • Python preferred, other languages acceptable
• Understanding of digital hardware concepts
  • Ability to read and debug RTL in SystemVerilog
  • Familiarity with debugging waveforms

Desirable skills and experience:

• Verification planning and execution from specification
• Building testbenches
• Functional modelling of hardware blocksChecker creation
• Whether in UVM, SystemC or another methodology
• SystemVerilog Assertions (SVA)
• Software fluency in multiple languages
• Open source tools for silicon development
  • Cocotb (used for all our testbench collateral), Verilator, Icarus Verilog
• Commercial EDA tools
• Formal verification
• Bazel is our chosen tool, familiarity is not expected
• Contributing to architecture discussions