Senior IP / SoC Verification Engineer

Job Description:

Arm’s Systems Development team creates subsystems and SoC designs for various application segments, using the latest IP products from Arm and other vendors. We are looking for creative and enthusiastic SoC Verification Engineers to join the team. For this role you will have knowledge of verifying and testing sophisticated IP such as CPU/GPU/DSP processors with memory controllers and interconnect fabrics. You will ensure all these products work effectively with each other and the software to enable our partners to produce outstanding systems.

Responsibilities:

1. Writing test plans, defining test methodologies, completing functional verification to the required quality levels and schedules
2. Working with project management and leads on planning tasks, setting schedules, and quality checkpoints.
3. Collaborate with engineers from other teams including architecture, design, implementation, modelling, performance analysis, silicon validation, FPGA and board development
4. Staff Engineers are also encouraged to mentor junior members

Required Skills and Experience:

1. Worked on embedded C/C++ based SoC verification environments
2. Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. (SystemVerilog), shell programming/scripting (e.g. Tcl, Perl, Python etc.)
3. Experienced in one or more of various verification methodologies – UVM/OVM, formal, low power, emulation
4. Exposure to all stages of verification: requirements collection, creation of verification methodology plans, test plans, testbench implementation, test case development, documentation and support
5. Practical experience of verifying on processor based system designs
6. Technical team leadership, mentoring or coaching experience

“Nice To Have” Skills and Experience:

1. Understanding of the fundamentals of Arm system architectures
2. Power aware and Clock Domain Crossing implementation
3. Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures.
4. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet
5. Development and deployment of large SoCs on emulation platforms

In Return:

We offer a competitive reward package including healthcare and wellness support. Other benefits include a contributory pension, and 25 days annual leave (with option to buy an additional 5 days per year).