Senior IC Physical Implementation Engineer

Arm Limited; Cambridge, Manchester, Sheffield; Hybride; GBP 60 000 - 90 000; Plein temps

Résumé du poste

Arm Limited is seeking an experienced physical implementation engineer to join our Solutions Engineering team, with the role based in Cambridge (also open to Manchester or Sheffield offices). You will shape power, performance and cohesiveness of Arm's solutions and influence EDA tool development to advance high-performance chip design.

In this role you’ll work across RTL to GDS2 flows, collaborate with chip design partners to ensure successful implementations, and help evolve methodologies to

Qualifications

• Experience of diverse physical implementation work covering the RTL to GDS2 design flow, preferably including a chip tapeout.
• Ability to analyse problems, reason logically about solutions and chart the appropriate course to take.
• Be able to dream big, explore new insights and communicate them effectively.
• Algorithmic thinking, with well-tested programming ability in Tcl, Make and Linux shell.

Responsabilités

• Carrying out physical implementation of Arm IP to tape out to silicon
• Deliver accurate results across a range of technology nodes to showcase the best of our designs
• Collaborate with our chip design partners to support their physical implementation success
• Develop and deploy new methodologies to improve implementation efficiency and results
• Convert ground-breaking R&D concepts into real implementation solutions

Connaissances

Physical implementation

Analytical thinking

Communication

Algorithmic thinking

Outils

Tcl

Make

Linux shell

Description du poste

Arm Limited is seeking an experienced physical implementation engineer to join our Solutions Engineering team, with the role based in Cambridge (also open to Manchester or Sheffield offices). You will shape power, performance and cohesiveness of Arm's solutions and influence EDA tool development to advance high-performance chip design.

In this role you’ll work across RTL to GDS2 flows, collaborate with chip design partners to ensure successful implementations, and help evolve methodologies to