Senior FPGA Engineer for Quantum Control Systems

Clutch Canada; Oxford; On-site; GBP 89,000 - 126,000; Full time

Benefits offered by this job

IonQ stock options

Annual performance bonus

Flexible hybrid working

Private medical and dental insurance

Job summary

IonQ is seeking a Staff FPGA Engineer to join our FPGA Team. You will design and develop RTL modules for real-time quantum control systems, own critical control functions, and contribute to high-performance FPGA software and firmware for quantum hardware.

Strong emphasis on signal processing and verification will be key. The role requires a Bachelor’s degree and 10+ years in FPGA development, with Python/MATLAB modelling, Xilinx Ultrascale+ experience, and lab/debug proficiency.

Qualifications

• Bachelor’s degree in Electrical Engineering, Physics, Mathematics or related technical field.
• Hands-on FPGA development experience and strong verification capability.
• Experience with Python and MATLAB/Simulink modelling.
• Familiarity with Xilinx Ultrascale+ MPSoC devices and common interfaces.

Responsibilities

• Design, develop and test RTL modules for real-time quantum control systems.
• Own and develop critical FPGA control functions supporting quantum hardware.
• Perform logic design and verification using Vivado, IP Catalog, and Block Design.
• Write test procedures and perform unit and system level testing; debug and document results.

Skills

FPGA design

FPGA verification

Signal processing

Python scripting

MATLAB/Simulink

Embedded systems

Education

Bachelor's degree in Electrical Engineering, Physics, Mathematics

Tools

Vivado

ModelSim

Synopsys

Cadence

Job description

IonQ is seeking a Staff FPGA Engineer to join our FPGA Team. You will design and develop RTL modules for real-time quantum control systems, own critical control functions, and contribute to high-performance FPGA software and firmware for quantum hardware.

Strong emphasis on signal processing and verification will be key. The role requires a Bachelor’s degree and 10+ years in FPGA development, with Python/MATLAB modelling, Xilinx Ultrascale+ experience, and lab/debug proficiency.