Senior Digital FPGA Engineer

JR United Kingdom; Milton Keynes; Hybrid; GBP 50,000 - 75,000; Full time

Job summary

A leading machine learning technology business is seeking a Senior Digital FPGA Engineer to develop state-of-the-art financial technology. Located in Cambridge, this role offers great benefits, hybrid working, and opportunities for innovation by working alongside machine learning specialists. Ideal candidates should have FPGA design experience and proficiency in SystemVerilog, with software skills in C/C++ or Python being advantageous.

Benefits

Fantastic benefits package

Hybrid working (3 days on site, 2 at home)

Qualifications

• Experience in FPGA design, development, and testing.
• Familiarity with SystemVerilog, VHDL, and/or Verilog.
• Software skills in C/C++ or Python preferred.

Responsibilities

• Develop FPGAs using SystemVerilog.
• Work with software and machine learning experts.

Skills

FPGA Design

SystemVerilog

C

C++

Python

VHDL

Verilog

Quartus

Vivado

Machine Learning

Job description

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Posted:

04.06.2025

Expiry Date:

19.07.2025

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Job Description:

Senior Digital FPGA Engineer - IP / Machine Learning in job available in Cambridge, Cambridgeshire

• Cambridge based business in the technology hub of the UK
• Rare opportunity to be part of a leading Machine Learning / AI technology business
• Fantastic benefits package and salaries on offer, including hybrid working (3 days on site, 2 at home)

A leading machine learning business involved in developing incredible financial industry technology are seeking skilled Senior Digital Design and FPGA Engineers to join their HQ in Cambridge. This company offers fantastic benefits, an enjoyable work culture and a real challenge, with exciting investment into new innovation.

As a Senior Digital FPGA Engineer you will develop FPGA's using SystemVerilog. You'll work closely with software and machine learning experts to help build low-latency / high-throughput applications.

What skills and experience is required:

• FPGA Design, development and testing experience
• Previous experience in using SystemVerilog, VHDL and/or Verilog
• Software skills using C / C++ or Python
• Exposure to Quartus and/or Vivado
• Any exposure or understanding of low latency, machine learning, or neutral network architectures would be beneficial but not essential.

If this hybrid Senior Digital FPGA Engineer job in Cambridge sounds of interest, please apply with your CV.