Senior Design Verification Engineer

Weare5vtech; Bristol; Remote; EUR 90,000 - 110,000; Full time

Job summary

A leading semiconductor specialist seeks a DFT Technical Lead to oversee DFT architecture for complex SoCs. This role involves collaboration with various teams and contribution to state-of-the-art ASICs. Candidates should have strong expertise in DFT, RTL design, and various testing methods, and come with substantial industry experience.

Qualifications

• Expertise in DFT for complex digital and SoC designs.
• Strong understanding of RTL design and DFT integration.
• Experience with advanced ASIC test methods.

Responsibilities

• Define and drive DFT architecture and implementation for complex SoCs.
• Develop DFT insertion flows, test vector generation, and validation processes.
• Collaborate with physical design teams ensuring DFT integration.

Skills

DFT expertise

RTL design understanding

ATPG

BIST

JTAG

Job description

DFT Technical Lead - Digital & SoC Design (CDI)

Location: Paris, Caen, or Remote in France

Salary: Up to €110,000 Gross per annum + company benefits

Join an innovative global semiconductor specialist in high-performance mixed-signal and digital ASICs. They focus on delivering custom system-on-chip (SoC) and transceiver solutions to clients in communications and industrial sectors, leading in advanced technology nodes and silicon-proven design excellence.

As a DFT (Design for Test) Technical Leader, you will oversee the design and implementation of DFT architecture for complex SoCs developed in advanced CMOS nodes. You will collaborate with RTL design, physical implementation, and industrialization teams to ensure efficient testability and high production yield.

You will drive test strategies, implement best-in-class DFT flows, and contribute to delivering state-of-the-art transceiver ASICs for various markets.

Your responsibilities:

• Define and drive DFT architecture and implementation for complex SoCs in advanced (sub-20nm) CMOS technologies.
• Develop and maintain DFT insertion flows, test vector generation, and validation processes.
• Analyze DFT metrics and optimize for test time, yield, and defect coverage.
• Collaborate with physical design and industrialization teams to ensure DFT integration does not compromise performance or area.

Your background:

• Expertise in DFT for complex digital and SoC designs.
• Strong understanding of RTL design and DFT integration.
• Experience with ATPG, BIST, ECC, redundancy techniques, and advanced ASIC test methods.
• In-depth knowledge of JTAG, Boundary Scan, and Memory Testing.

Note: 5V Tech acts as an Employment Agency for this vacancy. We offer a reward scheme if you recommend someone for this position, up to €250 for you and an additional €250 to a charity of your choice. 5V Tech is a recognized talent solutions provider within IoT and Deep Technology across Europe, the UK, and North America.