PhD in Sustainable Intelligence at the Edge: Integrating Intermittent Computing and Neuromorphi[...]

Newcastle University; United Kingdom; On-site; GBP 15,000 - 20,000; Full time

Job summary

A renowned research institution in the UK invites applications for a fully funded PhD position in Sustainable Intelligence at the Edge. This role seeks motivated candidates with a solid foundation in digital design and FPGA development, exploring energy-efficient solutions in low-power computing and neuromorphic architectures. Candidates with a Master's degree and strong communication skills are encouraged to apply.

Qualifications

• Solid foundation in digital design and computer architecture.
• Practical experience with FPGA development using tools like AMD/Xilinx Vivado.
• Proficiency in RTL design with Verilog or VHDL.

Responsibilities

• Conduct research in low-power computing and neuromorphic systems.
• Participate in international secondments for valuable experience.
• Contribute to research publications and documentation.

Skills

Digital design and computer architecture

FPGA development

RTL design with Verilog/VHDL

Embedded systems programming (C/C++)

Microcontroller platforms (Arm Cortex-M, RISC-V)

CPU peripheral integration

Debugging tools (ILA, logic analyzers)

Microcontroller debugging (JTAG/SWD)

SoC bus protocols (AXI, AHB)

Intermittent computing systems

Deploying soft-core processors on FPGAs

ASIC development processes

RISC-V architecture

Power estimation tools

Technical documentation

Non-volatile memory technologies

Education

Master's degree in Electrical Engineering, Computer Science, or related field

Job description

Organisation/Company Newcastle University Research Field Computer science » Computer architecture Researcher Profile First Stage Researcher (R1) Country United Kingdom Application Deadline 31 Oct 2025 - 00:00 (UTC) Type of Contract To be defined Job Status Negotiable

Offer Description

The Microsystems Research Group at Newcastle University invites applications for a fully funded, three-year PhD position within the REACT MSCA DN Project on Sustainable Intelligence at the Edge: Integrating Intermittent Computing and Neuromorphic Architectures. This interdisciplinary opportunity is ideal for a motivated candidate eager to explore cutting-edge research at the intersection of low-power computing and neuromorphic systems.

The successful applicant will join Dr Domenico Balsamo’s research team and will be supported by MSCA DN funding for 36 months. As part of the program, the DC candidate will participate in one or more secondments during the first three years of the project, gaining valuable international, industrial and cross-sector experience.

In this project, we will explore the convergence of intermittent computing and neuromorphic systems to enable energy-efficient, resilient edge intelligence. Intermittent computing addresses energy scarcity by allowing systems to operate with sporadic power while retaining state across power failures, ensuring seamless execution. Integrating these with neuromorphic architectures, which mimic brain-like computation, allows for low-power, adaptive processing. Together, they will form a robust framework for always-on, intelligent sensing in constrained environments such as IoT or biomedical devices, where energy reliability is limited but context-aware operation is essential. This synergy promises breakthroughs in sustainable, autonomous edge computing.

Key Accountabilities and Essential Qualifications

• Solid foundation in digital design and computer architecture
• Practical experience with FPGA development using tools such as AMD/Xilinx Vivado
• Proficiency in RTL design with Verilog or VHDL
• Programming experience in embedded systems using C/C++
• Familiarity with microcontroller platforms like Arm Cortex-M or RISC-V
• Good understanding of CPU peripheral integration and hardware-software co-design concepts
• Competence in using debugging tools such as Integrated Logic Analyser (ILA) and logic analyzers for FPGA-based systems
• Experience with microcontroller debugging via JTAG or SWD interfaces
• Knowledge of standard SoC bus protocols such as AXI or AHB
• Experience with checkpointing, state retention, or intermittent computing systems
• Hands-on work deploying soft-core processors on FPGAs
• Familiarity with ASIC development processes, including synthesis and power analysis
• Exposure to RISC-V architecture and open-source cores such as PicoRV32
• Experience with power estimation tools, e.g., Xilinx Power Estimator
• Ability to produce technical documentation or contribute to research publications
• Understanding of non-volatile memory technologies, such as flash or FRAM

Additional Requirements:

• Master's degree or equivalent in Electrical Engineering, Computer Science, or related field with excellent grades.
• Excellent English communication, presentation, and writing skills.
• Mobility Rule: Candidates must not have resided or carried out their main activity in the “host country” for more than 12 months in the 3 years immediately before the recruitment date.
• PhD Rule: Applicants must not already possess a doctoral degree at the date of recruitment.