Lead FPGA Architect for Secure Defense Tech

Copello Global

Slough

On-site

GBP 90,000 - 125,000

Full time

3 days ago
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Benefits offered by this job

25 days holiday plus bank holidays (or
Flexible working arrangements
Security clearance allowance where/app

Job summary

Copello Global is seeking a Principal FPGA Engineer to join a specialist defence engineering team in the UK. The role demands ownership of FPGA and firmware across the full lifecycle and provides strong technical leadership to FPGA/firmware engineers.

You will translate requirements into robust firmware, work with multiple FPGA families (Xilinx, Lattice, Altera/Microsemi), and drive verification, documentation and process improvements. DV security clearance is required or obtainable.

Qualifications

  • Experience across the full FPGA or firmware development lifecycle.
  • Experience with FPGA verification and test methodologies.
  • Ability to provide technical leadership to FPGA/firmware engineers.
  • Strong communication with technical and non-technical stakeholders.

Responsibilities

  • Lead architecture, design, development, integration and verification of FPGA/firmware systems.
  • Translate requirements into robust firmware specifications.
  • Provide technical leadership to a team of FPGA/firmware engineers.
  • Lead design reviews, create technical documentation and reports.
  • Maintain requirements traceability and verification methodologies.
  • Mentor less experienced engineers and collaborate with cross-functional teams.

Skills

FPGA design
VHDL
RTL design
Firmware
Verifications
Technical leadership
Schematic reading
FPGA lifecycles
CI/CD

Tools

Xilinx Vivado
EDA toolchains
DOORS
Enterprise Architect

Job description

Copello Global is seeking a Principal FPGA Engineer to join a specialist defence engineering team in the UK. The role demands ownership of FPGA and firmware across the full lifecycle and provides strong technical leadership to FPGA/firmware engineers.

You will translate requirements into robust firmware, work with multiple FPGA families (Xilinx, Lattice, Altera/Microsemi), and drive verification, documentation and process improvements. DV security clearance is required or obtainable.

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