Layout Engineer

Oxford Quantum Circuits (OQC); Reading; On-site; GBP 40,000 - 60,000; Full time

Benefits offered by this job

Collaborative work environment

Impactful projects in quantum technology

Job summary

A leading quantum technology company in Reading is seeking a Layout Engineer to create lithographic mask layouts for quantum device fabrication. You will transform device designs into manufacturable layouts and collaborate with multidisciplinary teams to ensure precision and scalability. This role requires experience with EDA tools and a BSc in a relevant STEM subject. Join a cutting-edge team and contribute to the advancement of quantum computing.

Qualifications

• Experience with EDA and mask layout tools to produce high-quality lithographic mask layouts.
• Able to apply design rules and execute robust DRC and LVS checks.
• Demonstrable background in streamlining layout workflows.

Responsibilities

• Transform conceptual device designs into manufacturable layouts.
• Develop and maintain internal layout methodologies and design processes.
• Work cross-functionally with engineers to translate component concepts into manufacturable layouts.

Skills

EDA and mask layout tools experience

Design rules application

Automation in layout workflows

Collaborative teamwork

Education

BSc in relevant STEM subject

Tools

KLayout

L-Edit

Cadence

Synopsys

Qiskit Metal

Job description

At OQC, we're building quantum computers to power the next era of scientific discovery and commercial innovation. Our mission is to put quantum in the hands of humanity and we're looking for exceptional engineers to help us achieve it.

We are seeking a Layout Engineer to join our Materials Science & Device Engineering (MSDE) team. In this hands‑on role, you will own the creation of lithographic mask layouts that translate quantum device designs into fabrication‑ready GDS layouts, driving quality, consistency and scalability across mask production.

The Role

You will transform conceptual device designs into manufacturable layouts, maintaining robust methodologies that ensure reliability and traceability across projects. Working closely with quantum, fabrication, RF and cryogenic engineers, you'll ensure layouts are accurate and process‑aligned.

Beyond layout delivery, you will strengthen our design ecosystem by developing reusable component libraries, enhancing DRC/LVS sign‑off flows, and introducing automation, helping evolve our approach toward a scalable, PDK‑like framework in a fast‑moving R&D environment.

What you’ll be working on:

• Own: Generate fabrication‑ready GDS mask layouts for lithographic patterning of quantum circuits, ensuring precision, clarity and alignment with process capabilities.
• Standardise: Develop and maintain internal layout methodologies and design processes that drive consistency, reliability and traceability across projects and mask generations.
• Collaborate: Work cross‑functionally with quantum, nanofabrication, RF and mechanical engineers to translate component concepts into manufacturable layouts, contributing actively to feasibility and design discussions.
• Build: Create and curate a scalable, reusable component library, consolidating existing assets into a unified, evolving PDK‑like framework.
• Validate: Define, expand and maintain robust DRC and LVS sign‑off flows, including custom rule development for non‑standard devices and research‑oriented fabrication processes.
• Automate: Develop and refine layout workflows using tools such as KLayout, L‑Edit, Cadence, Synopsys or Qiskit Metal, leveraging Python scripting to streamline layout generation, integration and validation.
• Improve: Identify opportunities to enhance layout robustness, efficiency and scalability, recommending new tools, methodologies and automation strategies.

What We’re Looking For:

We value precision, structured problem‑solving and a strong drive for quality in complex engineering environments.

• Design Experience: Experience with EDA and mask layout tools (e.g. KLayout, L‑Edit or equivalent) to produce high‑quality lithographic mask layouts for device fabrication.
• Translate requirements: Experience of converting device and component design concepts into fabrication‑ready GDS outputs, ensuring accuracy, clarity and manufacturability.
• Validation: Able to apply design rules and execute robust DRC and LVS checks to ensure layouts meet process and integration requirements.
• Automation: Demonstrable background in streamlining layout generation, verification and validation workflows.
• Develop: Introduce and develop reusable component libraries or PDK‑like frameworks.
• Collaborative: Worked effectively across multidisciplinary teams to align design intent with physical implementation.
• Documentation: Maintained clear documentation, version control and traceability of layout assets to support sign‑off, reproducibility and process tracking.
• Qualifications: Bring a BSc in a relevant STEM subject or equivalent practical experience, demonstrating strong foundational technical knowledge.

The “nice to haves”

• Experience with Qiskit Metal or similar layout‑generation frameworks.
• Exposure to non‑CMOS or research‑oriented fabrication processes with evolving or incomplete PDKs.

Why Join OQC?

At OQC, you’ll work alongside world‑class scientists and engineers redefining what’s computationally possible. This is a rare opportunity to contribute directly to the physical realisation of quantum processors, turning advanced device concepts into tangible, fabricated systems.

If you’re motivated by precision engineering, collaborative innovation and the challenge of building tools and frameworks in a cutting‑edge quantum environment, this is a role where your work will have lasting technical impact.

🌐 Learn more about our benefits and work culture here: https://oqc.tech/company/careers-at-oqc/