Kernel Engineer - Silicon Platform Integration (Remote)

remote work; United Kingdom; Remote; GBP 91,000 - 121,000; Full time

Job summary

Canonical creates Ubuntu and maintains the Linux kernel and related tooling. This role owns integrating silicon platform support into the Ubuntu Linux kernel, delivering silicon-optimized kernel variants, and collaborating with partners and the open-source community to ensure robust performance across SoCs.

What you'll do includes driving integration of platform support from silicon partners, resolving complex kernel issues, delivering silicon-optimized variants, and developing tooling for

Qualifications

• Proficiency in C for low-level system development.
• Strong understanding of device drivers, BSPs, and hardware-level system engineering.
• Knowledge of OS kernel fundamentals and Git proficiency for version control.
• Good communication in English, both written and spoken.
• Willingness to travel twice a year for company events up to two weeks.

Responsibilities

• Drive integration of platform support from silicon partners into the Ubuntu Linux kernel.
• Identify and resolve complex kernel issues reported by partners, customers, or tests.
• Deliver silicon-optimized variants of the Ubuntu kernel to the global community.
• Develop tooling and automation for reliable kernel delivery and testing.
• Manage upstream patch submission and review with internal and external maintainers.
• Collaborate with a globally distributed engineering team to achieve cohesive outcomes.

Skills

C programming

Device drivers

Git

Kernel fundamentals

Job description

Canonical creates Ubuntu and maintains the Linux kernel and related tooling. This role owns integrating silicon platform support into the Ubuntu Linux kernel, delivering silicon-optimized kernel variants, and collaborating with partners and the open-source community to ensure robust performance across SoCs.

What you'll do includes driving integration of platform support from silicon partners, resolving complex kernel issues, delivering silicon-optimized variants, and developing tooling for