IC Verification Engineer

PragmatIC Semiconductor; Cambridgeshire and Peterborough; On-site; GBP 60,000 - 90,000; Full time

Job summary

Pragmatic Semiconductor in Cambridge is seeking an IC Verification Engineer to join a high-performing IC Design team. You will implement verification strategies to ensure first-time tapeouts, collaborating with digital and analog designers and reporting results with clear debug feedback.

Ideal candidates have strong knowledge of verification methodologies (UVM highly desirable) and excellent communication. Opportunities to learn and grow are significant in this dynamic group.

Qualifications

• Solid understanding of verification methodologies and techniques.
• Ability to interpret design specs and define verification strategies.
• Experience with SystemVerilog for verification environments.
• Excellent verbal and written communication skills.
• Capable of meeting tight deadlines while juggling multiple projects.

Responsibilities

• Develop verification methodologies for mixed-signal IP and FlexICs.
• Collaborate with design engineers to interpret specifications.
• Create test bench environments to exercise designs.
• Debug failures and provide verification feedback to designers.
• Generate verification reports and statistics across design stages.

Skills

Verification methodologies

Design specifications

SystemVerilog

Communication skills

Project multitasking

Education

Degree in Electronic Engineering

Job description

Overview

We are recruiting in the Engineering group at Pragmatic Semiconductor! We are looking for an IC Verification Engineer to join our established, high-performing IC Design team in Cambridge. Reporting to the Senior IC Verification Engineer, you will be responsible for executing verification strategies to ensure right-first-time tapeouts.

Applying verification domain knowledge, this position requires close collaboration with both digital and analog designers, and the ability to proactively report results and debug issues.

We are looking for candidates with a solid understanding of verification methologies and techniques (with UVM - Universal Verification Methodology - highly desirable) and excellent cross-functional communication.

This is an excellent opportunity to join a cohesive and dynamic team during a critical period at Pragmatic Semiconductor, with significant opportunities to learn and develop.

Key tasks

• Develop appropriate verification methodologies for mixed-signal IP and FlexIC's
• Work closely with design engineers to interpret design specifications
• Create test bench environments to fully exercise designs
• Proactively debug failures and provide verification feedback to designers
• Create verification reports and statistics at different stages of design flow

Qualifications and training

You will ideally be educated to Degree/post-graduate/PhD level in a field such as Electronic Engineering, or will possess equivalent experience.

Skills and experience

ESSENTIAL

• Understanding of verification methodologies and techniques
• Ability to understand design specifications and to define verification methodologies
• Experience in using System Verilog
• Excellent communication skills, both verbal and written
• Ability to work to tight deadlines and progress multiple projects simultaneously

DESIRABLE

• Experience in UVM (highly desirable)
• Knowledge of mixed-signal verification techniques (RNM, Verilog-AMS)
• Knowledge of Gate level simulations
• Proficiency in Formal Verification
• Experience in defining and implementing functional, code and toggle coverage
• Experience in post-tapeout bring-up and HW-SW debug
• Knowledge of DFT and ATPG

Candidates who do not meet every requirement but feel their skills are a good fit for the role the role are encouraged to apply.

Pragmatic Semiconductor is committed to equity, equality, diversity, and inclusion; we strive to welcome everyone and create inclusive teams. We celebrate difference and encourage everyone to be themselves at work. Please let us know if you would like any adjustments to our application and interview process.