IC Physical Design Engineer

Fractile; London; On-site; GBP 70,000 - 110,000; Full time

Job summary

A leading company in AI innovation seeks an IC Physical Design Engineer to implement complex designs for next-generation chips. The role involves collaborating across teams to enhance performance, power, and area metrics while using state-of-the-art EDA tools. Ideal candidates have strong expertise in physical design and a passion for pushing technological boundaries.

Qualifications

• 7+ years of experience in physical design for advanced technology nodes.
• Solid understanding of CMOS technology and semiconductor physics.
• Experience with high-performance computing (HPC) and AI accelerators.

Responsibilities

• Drive the physical implementation of ASIC/SoC designs.
• Collaborate with cross-functional teams to optimise performance.
• Perform power planning and analysis for design integrity.

Skills

Power optimisation techniques

Low-power design methodologies

Timing closure

Signal integrity

Problem-solving

Communication

Teamwork

Scripting languages

Education

Bachelor’s, Master’s or PhD in Electrical Engineering or Computer Engineering

Tools

Cadence Innovus

Synopsys ICC2

Mentor Graphics Calibre

Job description

Join to apply for the IC Physical Design Engineer role at Fractile

Join to apply for the IC Physical Design Engineer role at Fractile

Fractile’s mission is to enable a new chapter in the AI revolution. We’re pioneering AI innovation where hardware and software join to create something extraordinary, unlocking the power of the world’s largest language models with speed increases of x100. Our team is rapidly expanding, and we're searching for visionary engineers, scientists, and thinkers who share our passion for pushing boundaries and redefining what's possible. If you're ready to join a dynamic group of innovators shaping AI's future, we want to hear from you!

We are seeking a highly skilled Physical Design Engineer to contribute to our next-generation chip designs. As a Physical Design Engineer, you will be responsible for the end-to-end implementation of complex IC physical designs, from synthesis to sign-off. You will collaborate with cross-functional teams, including logic design, verification, and process technology, to optimise performance, power, and area (PPA) while ensuring design integrity and manufacturability.

Key Responsibilities

• Drive the physical implementation of ASIC/SoC designs, including floorplanning, placement, clock tree synthesis (CTS), routing, and sign-off.
• Work on synthesis, timing analysis (STA), and optimisation to achieve the best PPA metrics.
• Perform power planning and analysis, addressing IR drop, electromigration, and low-power design techniques.
• Ensure design rule check (DRC), layout vs. schematic (LVS), and other physical verification compliance.
• Collaborate with DFT engineers to integrate design-for-test (DFT) structures into the physical implementation.
• Utilise EDA tools such as Cadence Innovus, Synopsys ICC2, Mentor Graphics Calibre, and others.
• Interface with foundries and process engineers to ensure manufacturability and yield optimisation.
• Work closely with RTL and architecture teams to drive design feasibility, constraints, and physical-aware RTL design.
  
  

Preferred Qualifications

• Bachelor’ Master’s or PhD in Electrical Engineering, Computer Engineering, or a related field.
• 7+ years of experience in physical design for advanced technology nodes (e.g., 7nm, 5nm, or below).
• Strong proficiency in EDA tools for place & route, STA, and sign-off.
• Solid understanding of CMOS technology, semiconductor physics, and process limitations.
• Experience with low-power design methodologies, power optimisation techniques, and multi-power domain architectures.
• Expertise in timing closure, signal integrity, IR drop analysis, and formal verification.
• Proficiency in scripting languages like TCL, Perl, or Python for automation.
• Excellent problem-solving skills, communication, and teamwork in a collaborative design environment.
• Experience in high-performance computing (HPC), AI accelerators, or networking chips.

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Job function

  Engineering and Information Technology

• Industries

  Computer Hardware Manufacturing

Referrals increase your chances of interviewing at Fractile by 2x

Sign in to set job alerts for “Physical Design Engineer” roles.

Application Specific Integrated Circuit Design Engineer

Senior Engineer - Silicon Physical Design (Italy based)

London, England, United Kingdom 2 months ago

London, England, United Kingdom 6 days ago

London, England, United Kingdom 12 hours ago

Greater London, England, United Kingdom 3 days ago

London, England, United Kingdom 2 months ago

Performance Engineer, Innovation and Design Engineering

London, England, United Kingdom 15 hours ago

London, England, United Kingdom 2 days ago

London, England, United Kingdom 3 months ago

Harrow, England, United Kingdom 3 months ago

London, England, United Kingdom 3 days ago

London, England, United Kingdom 2 months ago

London, England, United Kingdom 3 weeks ago

Leeds, England, United Kingdom 1 week ago

London, England, United Kingdom 1 week ago

Head of Data Centre Design Engineering | EMEA

Design for Manufacture Engineer - Defence

Colchester, England, United Kingdom 1 week ago

Teacher of Design & Technology (Engineering)

Bexley, England, United Kingdom 1 week ago

Sittingbourne, England, United Kingdom 2 days ago

London, England, United Kingdom 1 week ago

London, England, United Kingdom 5 months ago

London, England, United Kingdom 1 week ago

London, England, United Kingdom 1 week ago

London, England, United Kingdom 3 weeks ago

Chelmsford, England, United Kingdom 3 days ago

London, England, United Kingdom 1 year ago

Design Engineer (RIBA 1-3) and Movement Specialist

We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.