Hardware Verification Engineer

Bayasystems; Cambridge; On-site; GBP 80,000 - 100,000; Full time

Job summary

A fast-moving semiconductor startup is seeking a Design Verification Engineer in England. The role requires expertise in UVM, SystemVerilog, and verification processes for complex IPs. Candidates should have over 8 years of experience in verification and strong problem-solving skills. Join a team focused on innovative solutions in the semiconductor industry and enjoy competitive compensation, including performance incentives and equity.

Benefits

Performance incentives

Equity

Qualifications

• 8+ years of current hands-on experience in block-level/IP-level/SoC-level verification.
• Excellent problem-solving skills and attention to detail.
• Strong communication and collaboration skills.

Responsibilities

• Create test plans for highly configurable IPs.
• Write UVM/SystemVerilog code to implement test plans.
• Collaborate with software teams for testbenches.

Skills

Verilog

SystemVerilog

UVM-based testbenches

Python

Arm AMBA protocols

Education

BS, MS in Electrical Engineering, Computer Engineering or Computer Science

Tools

EDA tools for simulation and debug

Job description

Baya Systems is inspired by thebaya bird , also known as theweaver . Baya birds weave very unique and intricate hanging nests from different materials. The nests are robust and safe while being extremely lightweight and efficient.

Baya is a fast-moving Series B startup built by serial entrepreneurs with a vision to accelerate intelligent computing in the emerging chiplet era. We focus on software-driven, unified fabric solutions for single-die and multi-die systems. We design and license disruptive intellectual property for use in semiconductor chips, with software development platforms to simplify the design process and reduce the time to market for complex System-on-Chip (SoC) and multi-chiplet systems. This enables our partners to innovate and deliver compelling solutions for data center, infrastructure, AI, Automotive, and Edge IoT markets. We are looking for energetic and dedicated individuals share our passion for enabling innovation and excellence in the semiconductor industry that empowers game-changing products and services!

DESIGN VERIFICATION ENGINEER

England, UK (Bristol, Cambridge, London)

We are seeking a seasoned Design Verification designer with a strong background in building testbenches and writing test sequences for complex IPs. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions

Responsibilities:

• Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi-chiplet systems

Write UVM/SystemVerilog code to implement the test plan, checkers, and scoreboards

Collaborate with software teams to define and implement configurable testbenches

Work with design teams test plans, failure debug, coverage, etc.

Qualifications and Preferred Skills

BS, MS in Electrical Engineering , Computer Engineering or Computer Science

8+ years and current hands-on experience in block-level/IP-level/SoC-level verification

Proficiency in Verilog, SystemVerilog

Familiarity with industry-standard EDA tools for simulation and debug

Deep experience with UVM-based testbenches

Experience with modern programming languages like Python

Knowledge of Arm AMBA protocols such as AXI, APB, and AHB

Understanding of Arm CHI protocol is a plus

Experience on working with IP's for caches, cache coherency, memory subsystems, interconnects, and NoC's

Experience with formal verification techniques, emulation platforms is a plus

Excellent problem-solving skills and attention to detail

Strong communication and collaboration skills

Compensation:

• Salary commensurate with experience
• Performance incentives
• Equity

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