Graduate Design Engineer

Jobtailor; Southampton; On-site; GBP 55,000 - 85,000; Full time

Job summary

Jobtailor in Southampton is seeking a skilled engineer to design, verify, and deliver high-performance digital hardware IP for wireless systems. You will implement RTL in SystemVerilog/Verilog/VHDL for FPGA/ASIC and work with cross-functional teams to translate system requirements into efficient hardware solutions.

You will develop testbenches and verification infrastructure, support automated workflows with Python/Bash, and produce comprehensive design documentation.

Qualifications

• Bachelor's or Master's degree in Electronic Engineering, Computer Engineering, Communications Engineering, Physics, Mathematics, or related field.
• Understanding of digital design fundamentals, including combinational and sequential logic, timing concepts, and digital architectures.
• Exposure to Verilog, SystemVerilog, or VHDL through academic projects, placements, internships, or personal projects.
• Basic knowledge of Python, MATLAB, Tcl, or Bash.
• Strong analytical, problem-solving, and debugging skills.
• Ability to communicate technical concepts clearly through reports and presentations.
• Structured approach to engineering tasks, with strong attention to detail and quality.
• Enthusiasm for learning and developing expertise in hardware design and wireless technologies.
• Experience with FPGA or ASIC development platforms and toolchains desirable.
• Understanding of RTL verification methodologies, simulation, and testbench development desirable.
• Knowledge of C or C++ desirable.
• Familiarity with Git desirable.
• Awareness of AXI, Ethernet, JESD204, or PCIe desirable.
• Understanding of digital signal processing concepts and hardware implementation desirable.
• Knowledge of 4G, 5G NR, Open RAN, satellite communications, or future wireless technologies desirable.
• Exposure to communications algorithms including error correction coding and decoding, channel estimation, equalisation, beamforming, MIMO processing, and synchronisation algorithms desirable.
• Experience with FPGA AI Engines or heterogeneous computing architectures desirable.
• Engineering curiosity demonstrated through projects, research, internships, competitions, open-source contributions, or personal development projects.
• Motivation to solve complex problems; keenness to learn from experienced engineers; collaborative team-player; adaptable.

Responsibilities

• Contribute to the design, implementation, verification, and delivery of high-performance digital hardware IP for wireless communication systems
• Develop RTL designs using SystemVerilog, Verilog, or VHDL for FPGA and ASIC technologies
• Support development and verification of communications signal processing functions and hardware architectures
• Collaborate with hardware, algorithm, software, and systems engineers to translate system requirements into efficient hardware implementations
• Develop and maintain testbenches, simulation environments, and verification infrastructure
• Support automated engineering workflows, build systems, and development tools using Python and Bash
• Produce technical documentation covering design specifications, implementation details, and verification results
• Follow engineering processes, coding standards, and design methodologies
• Participate in design reviews, technical discussions, and knowledge-sharing activities
• Continuously develop expertise in digital hardware and wireless communications engineering
• Attend the Southampton selection event in person if shortlisted

Skills

Digital Hardware Design

RTL Design Using SystemVerilog

FPGA Development

Testbench Development

Wireless Communication Technologies

Verilog

VHDL

SystemVerilog

Python

MATLAB

C/C++

Git

Open RAN

Education

Bachelor's or Master's degree in Electronic Engineering, Computer Engineering, Communications Engineering, Physics, Mathematics, or related

Tools

Git

Simulation Environments

Verification Infrastructure

Development Tools

Build Systems

Job description

• Contribute to the design, implementation, verification, and delivery of high-performance digital hardware IP for wireless communication systems
• Develop RTL designs using SystemVerilog, Verilog, or VHDL for FPGA and ASIC technologies
• Support development and verification of communications signal processing functions and hardware architectures
• Collaborate with hardware, algorithm, software, and systems engineers to translate system requirements into efficient hardware implementations
• Develop and maintain testbenches, simulation environments, and verification infrastructure
• Support automated engineering workflows, build systems, and development tools using Python and Bash
• Produce technical documentation covering design specifications, implementation details, and verification results
• Follow engineering processes, coding standards, and design methodologies
• Participate in design reviews, technical discussions, and knowledge-sharing activities
• Continuously develop expertise in digital hardware and wireless communications engineering
• Attend the Southampton selection event in person if shortlisted

Requirements

• Bachelor's or Master's degree in Electronic Engineering, Computer Engineering, Communications Engineering, Physics, Mathematics, or a related technical discipline
• Understanding of digital design fundamentals, including combinational and sequential logic, finite state machines, timing concepts, and digital architectures
• Exposure to Verilog, SystemVerilog, or VHDL through academic projects, placements, internships, or personal projects
• Basic knowledge of Python, MATLAB, Tcl, or Bash
• Strong analytical, problem-solving, and debugging skills
• Ability to communicate technical concepts clearly through written reports and verbal presentations
• Structured approach to engineering tasks, with strong attention to detail and quality
• Enthusiasm for learning and developing expertise in hardware design and wireless communications technologies
• Experience with FPGA or ASIC development platforms and associated toolchains is desirable
• Understanding of RTL verification methodologies, simulation, and testbench development is desirable
• Knowledge of C or C++ is desirable
• Familiarity with Git is desirable
• Awareness of AXI, Ethernet, JESD204, or PCIe is desirable
• Understanding of digital signal processing concepts and hardware implementation is desirable
• Knowledge of 4G, 5G NR, Open RAN, satellite communications, or future wireless technologies is desirable
• Exposure to communications algorithms including error correction coding and decoding, channel estimation, equalisation, beamforming, MIMO processing, and synchronisation algorithms is desirable
• Experience with FPGA AI Engines or heterogeneous computing architectures is desirable
• Engineering curiosity demonstrated through projects, research, internships, competitions, open-source contributions, or personal development projects
• Motivation to solve complex problems
• Keenness to learn from experienced engineers
• Collaborative team-player orientation
• Adaptability and willingness to take on new technical challenges
• Proactive, self-motivated, and capable of working independently when required
• Strong interpersonal and communication skills
• Commitment to maintaining high engineering standards and delivering quality results

Core Competencies

Demonstrates expertise in digital hardware design and verification, particularly in wireless communication systems, utilizing SystemVerilog, Verilog, or VHDL. Proficient in developing testbenches and simulation environments while collaborating effectively with cross-functional teams.

Highest-signal resume keywords

• Digital Hardware Design
• RTL Design Using SystemVerilog
• FPGA Development
• Testbench Development
• Wireless Communication Technologies

ATS Optimization Keywords

Hard Skills

• SystemVerilog
• Verilog
• VHDL
• Python
• MATLAB
• Tcl
• Bash
• Digital Signal Processing
• FPGA
• ASIC

Soft Skills

• Analytical Skills
• Problem-Solving
• Communication Skills
• Attention to Detail
• Team Collaboration

Industry Keywords

• Wireless Communication
• 4G
• 5G NR
• Open RAN
• Digital Architectures
• Error Correction Coding
• Channel Estimation
• MIMO Processing
• PCIe
• Ethernet

Tools & Technologies

• Git
• Simulation Environments
• Verification Infrastructure
• Development Tools
• Build Systems