FPGA Hardware Engineer- World-Leading Global Market Maker

Quality Control Specialist - Pest Control; London; On-site; GBP 50,000 - 80,000; Full time

Job summary

A leading company seeks FPGA Engineers for developing ultra-low-latency hardware solutions in London. Key responsibilities include designing FPGA-based trading systems and optimizing performance, seeking candidates with experience in FPGA design and strong programming skills. If you thrive in a fast-paced environment and are adaptable, this could be the perfect opportunity.

Qualifications

• Minimum 2 years experience in ASIC/FPGA design life cycle.
• Experience working in Verilog, System Verilog, and either Python or C++.
• Strong working knowledge of FPGA design flow.

Responsibilities

• Design and implement proprietary hardware trading systems.
• Accelerate algorithmic trade signal generation and order execution using FPGA.
• Performance analysis and optimization of existing RTL designs.

Skills

Verilog

System Verilog

Python

C++

FPGA design flow

Problem-solving

Data gathering

Education

Bachelors Degree in Computer Engineering

Bachelors Degree in Computer Science

Job description

FPGA Engineers at this award-winning multi-strategy hedge fund are responsible for the research, design and implementation of FPGA solutions for their ultra-low-latency trading systems. Accelerating trading decisions close to theoretical limits and partnering with both technologists and traders, they provide hardware solutions in areas such as fast networking, high-performance compute, and real-time acceleration.

The FPGA team is small and highly experienced. They're constantly driving to identify ways to become more productive, and are seeking FPGA Hardware Engineers who can help build the next generation of cutting-edge, ultra-low-latency hardware solutions.

Key Responsibilities:

• Work as part of a team on the design and implementation of proprietary hardware trading systems from concept to production.
• Design ultra-low-latency, high-throughput, FPGA-based custom financial trading systems to accelerate algorithmic trade signal generation and order execution.
• Accelerate network infrastructure and trading system components with high-speed FPGA designs.
• Performance analysis and optimization of existing RTL designs.
• Investigate the latency, throughput and capacity of emerging FPGA technologies.
• Work closely with cross-functional teams, including Quantitative Research, Engineering, and Traders.

Skill Set Requirements:

• Minimum 2 years experience in the full ASIC or FPGA design life cycle, including hardware architecture, RTL coding, simulation, verification, system integration, and testing.
• Experience working in Verilog, System Verilog, and either Python or C++.
• Strong working knowledge of FPGA design flow or physical design.
• Ability to work in a Linux environment.
• Exposure to network- and system-level protocols, packet-based data processing, and computer architecture.
• Excellent problem-solving skills, with strengths in conducting research and gathering data.
• Must be adaptable and team-oriented.
• Minimum Bachelors Degree in Computer Engineering, Computer Science, or related.

Financial experience is not required.

Contact
If this sounds like you, or you'd like more information, please get in touch:

George Hutchinson-Binks
[e-mail]
([phone]
linkedin.com/in/george-hutchinson-binks-a62a69252