SOC Design Lead

JR United Kingdom; Scotland; On-site; GBP 100,000; Full time

Job summary

A leading company in the semiconductor space is seeking a SOC/chip design lead to oversee the entire design and delivery process of new chips. This full-time role in Scotland requires extensive experience in chip design, architecture, and verification, offering a competitive salary and an exceptional additional package.

Qualifications

• 10-20 years' experience of full chip design and delivery.
• End to end chip / SOC delivery experience.
• Detailed knowledge of complex tape-out processes.

Responsibilities

• Responsible for the end-to-end design and architecture definition of new chips.
• Lead designer with full chip delivery responsibility.
• Define the whole process & design flow.

Skills

Digital / AMS

Functional verification - system verilog

Power management / PMIC

Synthesis / HLS / STA

Education

Degree / Masters / PhD in electronics / micro-electronics, physics or similar field

Job description

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Brand new, and cutting edge project, working for an exciting scale-up in the semiconductor space - to be based full-time from Scotland.

Salary is circa £100k (PLUS AMAZING ADDITIONAL PACKAGE)

I am looking for a SOC/chip design lead to be responsible for the end to end design, set-up, architecture defintion, defintion of the whole process & design flow and RTL design of new chips.

You will be the lead designer / architect with end to end responsiblity for delivering the full chip to delivery at the fab.

Must have experience:

• Degree / Masters / PhD in electronics / micro-electronics, physics or similar field
• 10-20 years' experience of full chip design and delivery / as a chip lead / or SOC architect
• Digital / AMS, analog-mixed-signal IP
• End to end chip / SOC delivery experience
• Functional verification - system verilog - IP, system, sub-system, block, top level experience
• Creation of test-benches
• detailed knowledge of complex tape-out processes, and interactions with fabrication plants
• Full digital design flow, from RTL2GDS
• power management / PMIC / ultra-low power / optimisation & performance
• synthesis / HLS / STA

Bonus / nice to have skills

• RF-SOC
• DSP, signal processing
• Flash memory - DDR / HBM / high-bandwith memory / cache chorency
• clock, timing constraints

This position is ONLY available to engineers with full UK working rights