CPU Verification Engineer (RISC-V/CPU Architecture)

CPU Verification Engineer

We are currently hiring for an experienced Hardware R&D Engineer focusing on CPU and RISC-V Cores. You will be responsible for the development of a brand new and competitive CPU architecture, and defining interfaces between hardware, firmware and the operating systems for systems based on it.

You will be working with a wider team of experts and architects, looking after client’s interests and requirements, turning them into reality, and bridging the architectural excellence and the user experience.

This opportunity is an onsite working position, with offices in Cambridge, London, or Edinburgh.

Key requirements:

1. Degree in Computer Science, Electrical Engineering or related discipline.
2. Working experience within the software development space, including C programming and knowledge of low-level assembler programming languages.
3. Understanding of CPU architecture and micro-architecture features (such as caches, MMU, SMP, coherency, CPU pipelines).
4. Familiar with ARM/RISC-V/MIPS architecture and the micro-architecture of current ARM/RISC-V CPU cores.
5. Strong understanding of modelling microprocessors using higher-level languages like C/C++.
6. Prior working experience with one or more of the following technologies: Advanced Vector Extensions (AVX), Scalable Vector Extension (SVE), Scalable Matrix Extension (SME), Confidential Compute Architecture (CCA), Morello/CHERI.

Keywords: CPU / Verification / Arm Architecture / C / C++ / MIPS / Micro-Architecture / Assembly / AVX / SVE / SME / CCA / Hardware / Compiler / Code Optimization / SoC / System-on-Chip / Firmware Development