CPU Performance/Modeling Expert

JR United Kingdom; Cambridge; On-site; GBP 60,000 - 100,000; Full time

Job summary

An established industry player is seeking a CPU Performance/Modeling Expert to join their innovative team in Cambridge. This pivotal role involves engaging in cutting-edge CPU/NPU development, focusing on workload modeling and architectural exploration. The ideal candidate will leverage their extensive experience to drive software/hardware integration and co-optimization for next-generation processors. With a strong emphasis on collaboration, this position offers the opportunity to contribute vital insights to the chip development process. If you are passionate about high-performance computing and eager to make a significant impact, this role is perfect for you.

Qualifications

• Extensive industry experience in workload modelling and CPU/NPU architecture.
• Strong programming skills in C++ and Python, with experience in performance simulators.

Responsibilities

• Investigate high-performance CPU/NPU architecture design and provide data support.
• Design and implement tool systems for architecture exploration and performance analysis.

Skills

Workload Modelling

CPU/NPU Architecture

Performance Projection

C++ Programming

Python Programming

Benchmark Analysis

GPGPU Performance Analysis

Deep Learning

Computer Vision

Natural Language Processing

Tools

GEM5

Sniper

TensorFlow

PyTorch

CUDA

OpenCL

Job description

Social network you want to login/join with:

CPU Performance/Modeling Expert, Cambridge

col-narrow-left

Client:

microTECH Global LTD

Location:

Cambridge, United Kingdom

Job Category:

Other

-

EU work permit required:

Yes

col-narrow-right

Job Views:

4

Posted:

26.04.2025

Expiry Date:

10.06.2025

col-wide

Job Description:

The role we are seeking to fill is for a senior Technical Expert with a profound background in workload modelling and CPU/NPU Architecture.

This expert will be a key member of a team at the forefront of CPU/NPU development. Responsibilities will include planning and implementing tool systems for architectural exploration and performance analysis. Additionally, the role involves driving software/hardware vertical integration and planning software/hardware co-optimization features for next-generation processors.

The ideal candidate should possess a strong understanding of CPU/NPU architecture and workload extraction, as well as a good grasp of compiler, binary analysis, and software/hardware co-optimization.

Key Responsibilities:

Engage in the investigation of cutting-edge, high-performance server CPU/NPU core and SOC architecture design, contributing vital data support for crucial decision-making processes.

Design and execute the implementation of relevant tool systems for the exploration of architecture and the analysis of performance.

Develop strategies for software/hardware co-optimization features and lead the integration of software and hardware components for the next generation processor.

Construct a non-intrusive, highly accurate system for characterizing and modelling complex workloads, ensuring precise workload representation.

Analyse and extract the distinctive features of real-world scenario workloads, delivering essential insights to our in-house chip development department.

Required:

Possess extensive industry experience in workload modelling and the development of CPU/NPU architecture.

Skilled in performance projection and architectural exploration using SoC simulators.

Proficient in the development of Slicing Tools.

Skilled in developing and utilizing performance simulators, including GEM5 (O3 model), Sniper, and others.

Proficient in benchmark analysis and characterization.

Experience in GPGPU performance analysis

Great knowledge of theory and practice of deep learning, computer vision, natural language processing, or computer graphics

Strong programming skills in languages such as C++ and Python. Experience with frameworks like TensorFlow, PyTorch

Strong grasp of binary analysis, and software/hardware co-optimization techniques.

Excellent collaboration and interpersonal skills

Considered as a plus

Experience in developing for QEMU and DynamoRIO (or x86 PIN).

Experience in developing and using performance simulators like GEM5 (O3 model), Sniper or others

Experience with CUDA or OpenCL programming is a plus