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[CONTRACT] SoC Verification Engineer

TN United Kingdom

London

Remote

GBP 125,000 - 150,000

Full time

6 days ago
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Job summary

An innovative firm is seeking a SoC Verification Engineer to join their team. This role offers the chance to work on cutting-edge technology, focusing on the verification of complex systems on chips (SoCs). You will leverage your expertise in design and verification methodologies, using advanced tools to ensure the highest quality standards. Collaborate with a dynamic team in a fast-paced environment, where your analytical skills and communication prowess will shine. This opportunity allows for remote work, making it an ideal fit for talented engineers looking to make a significant impact in the tech industry.

Qualifications

  • Experience in SoC design and verification with industry standard tools.
  • Proficient in developing test benches using SV/UVM methodology.

Responsibilities

  • Verify complex units on SoC using industry standard methodologies.
  • Develop unit and subsystem level test benches.

Skills

SoC design and verification
SV/UVM methodology
Constrained random verification
C model integration
AMBA protocols
Debugging test failures
Gate Level Simulation (GLS)
Analytical skills
Communication skills

Tools

System Verilog
Verilog
C/C++
System C
TCL/Perl/shell-scripting

Job description

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[CONTRACT] SoC Verification Engineer, London

Client: microTECH Global Ltd

Location: London, United Kingdom

Job Category: -

EU work permit required: Yes

Job Reference: f2caf5ee3a

Job Views: 3

Posted: 18.04.2025

Expiry Date: 02.06.2025

Job Description:

Job title: SoC Verification Engineer
Location: UK/Remote
Contract: Contract
Start: ASAP
Duration: 6 months

For our client, we are looking for a SoC Verification Engineer. Candidates must be based in the UK, although the work can be performed remotely.

Job Requirements:
  1. Experience in design and verification on SoCs and SoC Methodologies for verifying complex units on SoC using industry standard tools and technologies.
  2. Proficient in developing unit and subsystem level test benches using SV/UVM methodology.
  3. Constrained random and Metrics driven verification.
  4. Experienced with C model integration and scoreboarding.
  5. FW code integration verification.
  6. Experience with AMBA protocols and BUS interconnect functional and formal verification along with coverage closure.
  7. Experience with power aware verification and clock domain crossing verification.
  8. Experience with debugging test failures.
  9. Experience in Gate Level Simulation (GLS) verification flow for SoC verification.
  10. Strong knowledge of verification planning, coverage analysis, pseudo and constrained random techniques, assertion based and formal verification techniques with System Verilog.
  11. Experience with Verilog, C/C++, System C, TCL/Perl/shell-scripting.
  12. Strong analytical skills and ability to work in a dynamic and fast paced team environment.
  13. Excellent communication skills.
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