C++ Low-Latency Tech Lead — London, 3 Days in Office

Oliver Bernard

Greater London

Hybrid

GBP 120,000 - 180,000

Full time

14 days+
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Benefits offered by this job

Annual bonus (25%)
London office 3 days/week

Job summary

Oliver Bernard in London seeks a senior C++ Low-Latency Technology Lead to join a high-performance technology team in a leading financial services firm. This hands-on leadership role focuses on ultra-low-latency systems, performance engineering and architecture optimisation.

You'll own a latency-sensitive C++ platform, driving improvements in architecture, latency, throughput and reliability, while mentoring engineers and collaborating with quant teams and senior stakeholders.

Qualifications

  • Strong expertise in low-latency / ultra-low-latency technology.
  • Deep understanding of C++ performance optimisation, memory management and CPU architecture.
  • Experience with garbage collection tuning and JVM performance, especially interop with C++/Java.
  • Concurrency, multithreading, lock-free programming and cache-aware design.
  • Experience profiling and eliminating latency at microsecond and sub-microsecond levels.
  • Excellent Linux, networking and systems-level performance knowledge.
  • Experience leading technically demanding engineering projects and mentoring senior engineers.
  • Strong communication skills to influence architecture and strategy.
  • Experience in trading, capital markets, or financial technology.

Responsibilities

  • Take technical ownership of a high-performance C++ platform.
  • Drive improvements across architecture, latency, throughput and reliability.
  • Collaborate with developers, quantitative teams and senior tech stakeholders to solve performance challenges.

Skills

Low-latency engineering
C++ optimization
Multithreading
Linux performance
CPU architecture
Latency profiling
Concurrency
Performance tooling
JVM interop (C++/Java)
Networking
Mentoring engineers
Trading/fintech awareness

Tools

Profiling tools
Latency benchmarking
Kernel/network optimization
FPGA knowledge

Job description

Oliver Bernard in London seeks a senior C++ Low-Latency Technology Lead to join a high-performance technology team in a leading financial services firm. This hands-on leadership role focuses on ultra-low-latency systems, performance engineering and architecture optimisation.

You'll own a latency-sensitive C++ platform, driving improvements in architecture, latency, throughput and reliability, while mentoring engineers and collaborating with quant teams and senior stakeholders.

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