Application Specific Integrated Circuit Design Engineer

JR United Kingdom; Cambridgeshire and Peterborough; On-site; GBP 80,000 - 120,000; Full time

Job summary

Join a leading semiconductor company as an ASIC Design Lead in Cambridge, where you'll oversee the development of high-quality ASIC designs. This role offers the chance to work with a talented team while driving project success, providing opportunities for leadership and mentorship within an innovative environment.

Benefits

Visa sponsorship

Relocation assistance

Qualifications

• 12+ years of industry experience in digital design.
• Proven ability to lead teams in delivering complex IP designs.
• Experience with CPU or DSP-based design and IP integration.

Responsibilities

• Collaborate with system and architecture teams to deliver digital IP blocks.
• Lead team performance and create detailed project plans.
• Mentor junior engineers and ensure design quality.

Skills

Digital design principles

Leadership

Verilog/SystemVerilog

Power analysis

SoC-level design

Job description

Application Specific Integrated Circuit Design Engineer, Cambridgeshire

Client:

IC Resources

Location:

Cambridge, UK

Job Category:

Other

EU work permit required:

Yes

Job Views:

2

Posted:

31.05.2025

Expiry Date:

15.07.2025

Job Description:

ASIC Design Lead

Cambridge

Global Semiconductor leader – 5 days onsite

Salary + Bonus + RSUs

We are seeking an ASIC Design Lead to join a leading semiconductor company in Cambridge. The ideal candidate will have a deep understanding of digital design and proven leadership experience in delivering high-quality ASIC designs within schedule. This role requires exceptional technical expertise and leadership qualities, with accountability for 4-5 engineers and potential technical leadership over up to 20 engineers.

Key Responsibilities:

• Collaborate with system and architecture teams to specify, develop, and deliver digital IP blocks for multiple projects.
• Lead team performance, ensuring alignment with project goals and schedules.
• Create detailed project plans, including timelines, milestones, and deliverables.
• Mentor junior engineers and foster a collaborative environment.
• Define high-level specifications and micro-architecture for low-power IPs.
• Ensure design quality, RTL acceptance, performance, and verification closure.
• Support synthesis and timing closure, including ECO creation.

Qualifications and Experience:

• 12+ years of industry experience in digital design.
• Proven ability to lead teams in delivering complex IP designs from concept to post-silicon support.
• Deep knowledge of digital design principles, methodologies, and tools.
• Experience with Verilog/SystemVerilog.
• Knowledge of power analysis at RTL and gate level.
• Experience with CPU or DSP-based design, SoC-level design, and IP integration.
• Leadership experience managing small teams.

This is a fantastic opportunity to join a cutting-edge company and see your work on the shelf! Visa sponsorship and relocation assistance are available for candidates currently in the EU or UK.