AI Chip Software & Compiler Engineer (LLM Optimization)

Ecarx Co.; Greater London; On-site; GBP 100,000 - 150,000; Full time

Job summary

Ecarx Co. in London is seeking an experienced AI/ML systems engineer to design compiler passes for AI accelerators, optimize kernels, and advance LLM inference work. You will bridge AI research and hardware, collaborating with software and hardware teams to push performance and efficiency.

The role requires deep knowledge of C/C++, Python, GPU programming, and DL frameworks, with a track record of optimizing AI workloads on accelerator architectures.

Qualifications

• 5+ years in HPC, compiler dev, or AI/ML systems.
• Strong coding skills in C/C++ and Python.
• Deep experience with GPU/AI accelerator programming (CUDA/OpenCL).
• Hands-on experience with DL frameworks (PyTorch, TensorFlow, JAX).
• Understanding of neural nets and compute patterns (transformers, CNNs, RNNs).
• Experience with performance optimization, profiling AI workloads.

Responsibilities

• Design and implement compiler passes and optimization strategies for AI accelerator code generation (LLVM/MLIR-based).
• Develop high-performance kernel libraries (GEMM, convolution, attention) for our accelerator.
• Lead LLM inference optimization including KV cache management, batching, quantization.
• Collaborate with hardware architects to define ISA, model, and features.
• Integrate compiler stack with PyTorch, ONNX, and other formats.
• Build performance analysis tools and benchmarks to measure model execution.
• Drive optimization across full stack from model to instruction scheduling.
• Contribute to AI software roadmap and accelerator ecosystem.

Skills

C/C++

Python

GPU/accelerator programming

DL frameworks

Transformer architectures

Performance optimization

LLVM/MLIR

Education

BSc/MSc/PhD in CS/EE

Tools

PyTorch

TensorFlow

JAX

Job description

Join our AI chip software team to build the compiler, runtime, and kernel libraries that unlock the full potential of our AI accelerator hardware. You will work at the intersection of AI models and silicon, optimizing large language model (LLM) inference and training workloads for our custom accelerator architecture. This role is ideal for someone who enjoys bridging the gap between cutting-edge AI research and high-performance hardware.

Responsibilities

• Design and implement compiler passes and optimization strategies for AI accelerator code generation (LLVM/MLIR-based)
• Develop high-performance kernel libraries (GEMM, convolution, attention, normalization) optimized for our AI accelerator architecture
• Lead LLM inference optimization on our hardware platform — including KV cache management, batching strategies, quantization, and speculative decoding
• Collaborate with hardware architects to define the accelerator ISA, programming model, and performance features
• Work with the AI framework team to integrate our compiler stack with PyTorch, ONNX, and other model formats
• Build performance analysis tools and benchmarks to measure and improve model execution efficiency
• Drive performance optimization across the full stack — from model-level down to instruction scheduling
• Contribute to the AI software roadmap and help shape the direction of our accelerator software ecosystem

Qualifications

• 5+ years of experience in high-performance computing, compiler development, or AI/ML systems
• Strong programming skills in C/C++ and Python
• Deep experience with GPU/AI accelerator programming (CUDA, OpenCL, or similar)
• Hands-on experience with deep learning frameworks (PyTorch, TensorFlow, JAX)
• Understanding of neural network architectures and their computational patterns (transformers, CNNs, RNNs)
• Experience with performance optimization, profiling, and benchmarking of AI workloads
• Knowledge of compiler infrastructure (LLVM, MLIR, XLA, or TensorRT)
• BSc, MSc, or PhD in Computer Science, Electrical Engineering, or related field

Preferred Qualifications

• Experience with LLM inference optimization techniques (vLLM, TensorRT-LLM, llama.cpp)
• Experience with Triton, TVM, or similar domain-specific compilers
• Knowledge of low-precision arithmetic (FP8, INT8, INT4) and mixed-precision training/inference
• Background in computer architecture or hardware design
• Open-source contributions to AI/ML projects