Internship - Technology & Cost Analyst - Computing

Yole Group; La Chapelle-sur-Erdre; Sur place; EUR 12 000 - 18 000; Plein temps

Résumé du poste

Zohorecruit seeks a Technology & Cost Analyst Trainee for a 6-month internship in La Chapelle-sur-Erdre, near Nantes (44). You will support the Computing Department by analyzing technology costs, assisting with cost models, and studying gate-all-around transistor processes for memory/logics.

Master's students in Microelectronics or related fields, with strong English skills and Excel/PowerPoint proficiency, are encouraged to apply.

Qualifications

• Master's level candidates in microelectronics or related field are required.
• Strong knowledge of semiconductors and interest in advanced technology.
• Excellent English speaking and writing (CECR B2 or TOEIC 785) required.

Responsabilités

• Interact with laboratory analysts to follow physical device analyses (chemical/mechanical openings, optical/SEM inspection, cross-sections).
• Learn to use internal costing tools to simulate costs.
• Research manufacturing process flow of 2 nm logic chips using gate-all-around transistors.
• Develop and verify process flow models through teardown results and literature review.
• Compare cost‑simulation approaches and feed results into the company's digital platform.

Connaissances

English proficiency

Analytical thinking

Autonomous & proactive

Formation

Master's in Microelectronics

Outils

Excel

PowerPoint

AI tools

Description du poste

Internship - Technology & Cost Analyst - Computing

La Chapelle-sur-Erdre, France | Posted on 09/28/2026

• Country France

Job Description

Ourcompany proposes a 6 months internship for Technology& Cost Analyst trainee tohelp us to further develop & support our Computing Department.

Thecore objective of th i s internship isto oversee the technology and industry insights from manufacturing trends anddesign of different computing &memory semiconductor devicesto estimate production cost and understand therelated manufacturing processes.

You willparticularly work on gate-all-aro und(GAA/GAAFET) transistor technologies, on memories and logic chips.

The positionis only opened to Master's students in engineering and based near Nantes(44).

Asa Technology & Cost Analyst Trainee, your main tasks will be to

• Interactwith the laboratory analyststo follow the physical analysis of devices (chemical and mechanical opening,optical and SEM microscope inspection, cross-sections…)
• Learn howto use internal costing tools to simulate the costs
• Research themanufacturing process flow of 2 nm logic chips based on gate-all-around (GAA)transistors
• Participatein d evelop ing and verif ying processflow models through teardown results, survey and publication research
• Compare costsimulation approaches and feed the results into our digital platform

Requirements

PROFILE

• AMaster's student in Microelectronics, Nanotechnology, Materials engineering ora related subject
• Deepknowledge of semiconductors and interest for advanced technolog ies
• ExcellentEnglish speaking/writing is mandatory (minimum CECR - B2 / TOEIC 785)
• Goodknowledge of Excel, PowerPoint and AI tools
• Autonomous,proactive, rigorous with good analytical and synthetical skills