ASIC/NoC SoC Deployment Architect

European Tech Recruit; Guyancourt; Sur place; EUR 90 000 - 130 000; Plein temps

Résumé du poste

European Tech Recruit is seeking an ASIC/NoC SoC Deployment Architect in Guyancourt, France. You will focus on deploying custom interconnect IPs, tools, and verification methodologies to accelerate SoC integration with desired PPA characteristics.

You will collaborate with architecture, hardware, software, verification, and emulation teams to drive NoC solutions, contribute to interconnect requirements, and develop training materials for global teams.

Qualifications

• Deep understanding of SoC development flow including architecture, RTL, verification, and memory systems.
• Knowledge of interconnect protocols (AHB/AXI/ACE/CHI/NoC) and system-level features.
• Scripting skills in Python and Perl for automation and tool development.

Responsabilités

• Collaborate with Architecture, Hardware, software, verification and emulation teams to ensure efficient use of technology in SoCs.
• Contribute to interconnect requirements and configuration across various SoCs.
• Provide technical support for new solutions and resolve NoC micro-architecture issues.
• Define new solutions and improvements for interconnect technology.
• Develop technical materials and organize trainings for teams worldwide.

Connaissances

SoC architecture

RTL design & verification

NoC concepts

Python scripting

Interconnect protocols

Perl scripting

Adaptability

Outils

Python

Perl

Description du poste

European Tech Recruit are working closely with a multinational Semiconductor company, based in Guyancourt, who are looking for a talented ASIC/NoC SoC Deployment Architect to join their team.

In this role you will focus on developing and deploying custom-built interconnect hardware IPs, software tools, and exploration and verification methodologies so that SoC integration teams can quickly assemble SoCs with the desired Power Performance Area (PPA) characteristics.

Responsibilities as ASIC/NoC SoC Deployment Architect:

• Collaborate regularly with highly skilled experts across different teams (Architecture, Hardware, software, verification, emulation, ...) to ensure the technology is used efficiently in SoCs.
• Contribute to the definition of interconnect requirements and configuration in the various SoCs.
• Be responsible for the technical support of new solutions.
• Help resolving NoC micro-architecture and NoC integration issues.
• Participate in defining new solutions and improvements for the technology.
• Develop in-depth technical material and organize trainings for different teams worldwide.

Requirements:

• Strong understanding of overall SoC development flow: SoC architecture, RTL design and verification, SoC performance and DDR memory channel, physical implementation, silicon debug.
• Good knowledge in system level features such as memory-mapping, MMUs, Quality of service, cache infrastructure, security schemes, etc..
• Strong analytical skills for debug in simulation, emulation or silicon bring-up environments.
• Understand of interconnect protocols like AHB/AXI/ACE/ACE-Lite/CHI/NoC concepts.
• Python & Perl scripting.
• Ability to quickly react and adapt to changes.

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