Analog IC Layout Engineer

Chipright; France; Sur place; EUR 40 000 - 60 000; Plein temps

Résumé du poste

A leading technology company is seeking an experienced Analog IC Layout Engineer in France. Responsibilities include developing layouts for high-speed interface applications and ensuring design integrity through effective planning and routing. Candidates should have over 7 years of experience in Analog Layout, with proficiency in Cadence tools and deep sub-micron CMOS technology. This role offers an attractive salary package.

Qualifications

• 7+ years of minimum experience in Analog Layout.
• Experience in Layout of blocks like PLLs, Transceivers, and Receivers.
• Ability to influence architecture-level and design for effective layout.

Responsabilités

• Work on high-speed interface applications for customers.
• Ensure design layout can be achieved through architectural influence.
• Conduct Design Rule Checking (DRC) and Physical Verification.

Connaissances

Analog Layout

Deep sub-micron CMOS (28nm)

Cadence tools

Power Routing

ESD level design

Outils

Cadence

Description du poste

Analog IC Layout Engineer

Salary: Very Attractive Rate

Location: France

Contract

Chipright seeks highly motivated and experienced Analog Layout development engineer to work on high speed interface applications for our customer.

Requirements

• 7+ years’ minimum experience in Analog Layout
• Experience in Layout of blocks such as PLLs, Transceivers, Receivers
• Experience working on deep sub-micron CMOS (28nm)
• Proficient with Cadence tools
• Ability to influence the architecture-level and design to ensure design layout can be achieved
• Experience with Floor Planning, Power Routing and ESD level design
• Experience with Place & Route, Layout Finishing
• Experience with Design Rule Checking (DRC) and all aspects of Physical Verification

Contact Annette TODAY on [e-mail] or on [phone] for more details