Senior AMS DV Engineer

Analog Devices, Inc.; España; On-site; EUR 43,000 - 62,000; Full time

Job summary

Analog Devices, Inc. in Valencia, Spain seeks a Senior AMS Design Verification Engineer to join the Custom Silicon Solutions Group and drive mixed-signal verification across a multi-site team. You will contribute to verification strategy and mentor junior members in AMS methodologies.

Applicants should have 5+ years of experience in SOC AMS verification, with UVM, Cadence tools, SVRNM or Verilog-AMS, and scripting. Some travel is expected while compensation includes a discretionary bonus.

Qualifications

• Minimum 5 years of chip-level AMS verification experience.
• Familiarity with UVM and digital mixed-signal verification approaches.
• Proficiency with Cadence-based flows and SVRNM/Verilog-AMS for analog blocks.

Responsibilities

• Act as a mixed-signal verification team member in a multi-site group.
• Contribute to verification strategy and method improvements.
• Develop directed tests in AMS environments and track defects in Jira.

Skills

AMS verification

UVM

Python scripting

Scripting languages

Debugging

Education

Electronic Engineering degree

Tools

Cadence AMS

Verilog-AMS

Cadence flow

Scripting (Python)

Job description

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X .

Senior AMS DV Engineer

Custom Silicon Solutions Group

The Group:

The charter of ADI’s CSS team is to lead the market in several technology domains with highly differentiated sensing and signal processing solutions. Today these technology areas include Capacitive Sensing, Optical Image Stabilization, Optical sensing, Audio, Capacitance or Laser Driving, and Power, which drive growth in our portable Consumer business. With a goal to deliver sustainable growth the CSS group will present the successful candidate with a great opportunity for continuous career development as part of a highly motivated and supportive team.

The Position:

The group is seeking an experienced Senior AMS Design Verification Engineer to work on the development of new product solutions for portable consumer applications, engaging directly with our Tier 1 OEMs, along with supervisor/mentor leadership opportunities.

Responsibilities

• Acting as a mixed signal verification team member in a multi-disciplinary (Digital/Analog/DV/Implementation/Layout) multi-site development team
• Contribute towards verification strategy and methodology improvement
• Understand device requirements and come up with traceable AMS verification plan
• Code/generate SVRNM models of required analog blocks and validate against schematic.
• Develop directed tests in AMS environment or reuse constrained random UVM testcases
• File and track bugs to closure in Jira
• Document results of assigned tasks and review the results with the team

Requirements

• Electronic Engineering degree with 5+ years’ experience as in chip level AMS (analog mixed signal) verification of SOC
• Familiarity with latest digital verification methodologies like digital mixed signal verification (DMS) using UVM
• Fluent with Cadence-based flow- Create schematics, Simulator/Netlist options etc.
• Experience with mixed signal simulators such as Cadence AMS or equivalent
• Experience with SVRNM or verilogams behavioural model coding for analog blocks
• Strong coding, object-oriented programming, and documentation skills.
• Experience with a scripting language (Python, C, Perl, etc.) would be an advantage
• Team player with good analysing and debugging skills
• Some limited travel should be expected.

#LI-RW1

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

Required Travel: Yes, 10% of the time

Shift Type: 1st Shift/Days

Compensation and Benefits

• The pay range for this position in Spain, Valencia, Cortes Valencianas is €43,120 to €62,440.
• This range may change if you are hired in another location. The stated range may be inclusive of several levels within this role and will be narrowed during the interview process based on a number of factors, including the candidate's experience, qualifications, and specific location. Applicants interested in this role who are not located in the primary location may request the applicable pay range for their location during the interview process if an alternative location is an option.
• This position qualifies for a discretionary performance-based bonus, the criteria for which are based on company factors and will be shared during the recruitment process.
• This role may also be eligible for variable compensation, paid annual leave, and supplemental benefits as applicable under local policy and the terms and conditions of employment.