Hybrid FPGA Hardware Engineer - Avionics Defense

GMV Spain; Tres Cantos; Hybrid; EUR 55,000 - 75,000; Full time

Benefits offered by this job

Hybrid working model

Relocation package

Wellbeing program

International mobility

Flexible hours

Job summary

GMV Spain is seeking an FPGA Hardware Engineer to join the Defence Avionics team. The role focuses on safety‑critical FPGA designs for avionics, with responsibilities across the full development lifecycle and verification.

The ideal candidate has at least 2 years in HW/SW in regulated environments, strong VHDL skills, and experience with DO-254 and high‑speed interfaces. Hybrid work and relocation support are offered.

Qualifications

• For this position, a professional with at least 2 years of experience in HW/SW development within complex, regulated technical environments.
• Experience in FPGA development, including architecture design, simulation, and hardware verification in a lab environment.

Responsibilities

• Design and implement digital architectures on FPGAs for avionics systems.
• Develop programmable logic using VHDL.
• Define and analyse technical design requirements.
• Perform functional simulations and verify correct design operation.
• Carry out hardware testing and validation.
• Contribute to the entire FPGA lifecycle from requirements to verification.
• Collaborate with multidisciplinary teams on hardware and electronic systems integration.
• Apply quality standards and certification procedures relevant to aerospace hardware development.

Skills

FPGA development

VHDL

Digital architecture design

Functional simulation

Hardware verification

PCIe interfaces

Git and SVN

Libero IDE

DO-254

Electronic systems integration

Education

Bachelor's degree in Systems Engineering, Telecommunications Engineering, or related field

Tools

Libero IDE

Git

SVN

Job description

GMV Spain is seeking an FPGA Hardware Engineer to join the Defence Avionics team. The role focuses on safety‑critical FPGA designs for avionics, with responsibilities across the full development lifecycle and verification.

The ideal candidate has at least 2 years in HW/SW in regulated environments, strong VHDL skills, and experience with DO-254 and high‑speed interfaces. Hybrid work and relocation support are offered.