Research Assistant: Synchronized LoRa Mesh on STM32 in Arctic

Danmarks Tekniske Universitet; Ørsted; On-site; DKK 500,000 - 620,000; Full time

Job summary

DTU seeks a candidate with a strong academic background in synchronized LoRa mesh networking and a solid command of the STM32 embedded ecosystem. The project focuses on a time-coordinated, low-power data collection protocol for off-grid Arctic environments, with field deployments and large-scale simulations.

You will design, implement, and evaluate the protocol on STM32WL hardware, extend a C++ network simulator, and coordinate contributions across international partner institutions under the

Qualifications

• Academic background in synchronized LoRa mesh networking.
• Strong working knowledge of the STM32 embedded environment, ideally including the STM32WL series.
• Demonstrated ability to build network simulation tools in C++.
• The position requires a master’s degree in engineering or equivalent.

Responsibilities

• Design, implement, and evaluate a synchronized LoRa mesh protocol for time-coordinated, low-power operation.
• Develop and test embedded firmware on STM32WL hardware, including its integrated sub-GHz radio.
• Extend and maintain a custom C++ network simulator to evaluate protocol behaviour and scalability.
• Plan and support field deployment of demonstrators in off-grid Arctic locations.
• Coordinate technical deliverables and reporting across partner universities and municipalities.
• Contribute to project documentation, technical guidelines, and deployment roadmaps.

Skills

LoRa mesh

STM32 Embedded

C++ simulation

STM32WL

Education

Master’s degree in engineering

Tools

STM32WL toolchain

Network simulator

Job description

DTU seeks a candidate with a strong academic background in synchronized LoRa mesh networking and a solid command of the STM32 embedded ecosystem. The project focuses on a time-coordinated, low-power data collection protocol for off-grid Arctic environments, with field deployments and large-scale simulations.

You will design, implement, and evaluate the protocol on STM32WL hardware, extend a C++ network simulator, and coordinate contributions across international partner institutions under the