Senior HPC AI Network Architect: Scalable Infra

NVIDIA Corporation; Zürich; Vor Ort; CHF 180.000 - 240.000; Vollzeit

Zusammenfassung

NVIDIA Corporation in Switzerland seeks a Senior HPC and AI Network Software Architect to shape scalable AI infrastructure. You will design distributed training and inference platforms, focusing on throughput, latency, and memory efficiency across large clusters.

Collaborate with researchers and engineers, integrate with frameworks like PyTorch and TensorFlow, and drive hardware-software co-design across GPUs, DPUs, and interconnects to accelerate future AI workloads.

Qualifikationen

• PhD or equivalent industry experience in computer science, engineering, or related field.
• 5+ years in systems programming, distributed computing, or large-scale data movement.
• Strong C++, Python, and CUDA or GPU programming experience.
• Production-grade performance-critical software development experience.
• Experience with AI frameworks (PyTorch, TensorFlow, JAX) and high-throughput systems.

Aufgaben

• Build and evolve architecture of scalable software for distributed AI training and inference.
• Improve runtime capabilities in NCCL, UCX, UCC for frontier AI workloads.
• Collaborate with AI framework teams and internal platform teams to boost end-to-end performance.
• Work with GPUs, DPUs, and interconnects to accelerate data movement for training, inference, and model serving.
• Drive innovation across runtime systems and communication libraries for robustness.

Kenntnisse

C++

Python

CUDA

Distributed systems

Performance tuning

Ausbildung

PhD in CS/CE

Tools

NCCL

UCX

UCC

PyTorch

TensorFlow

JAX

Jobbeschreibung

NVIDIA Corporation in Switzerland seeks a Senior HPC and AI Network Software Architect to shape scalable AI infrastructure. You will design distributed training and inference platforms, focusing on throughput, latency, and memory efficiency across large clusters.

Collaborate with researchers and engineers, integrate with frameworks like PyTorch and TensorFlow, and drive hardware-software co-design across GPUs, DPUs, and interconnects to accelerate future AI workloads.