Senior Architect, Scalable AI Networking & HPC

NVIDIA Corporation; Zürich; Hybrid; CHF 260.000 - 380.000; Vollzeit

Zusammenfassung

NVIDIA Corporation seeks a Senior HPC and AI Network Software Architect to design and implement scalable software for distributed AI training and inference across large GPU clusters. You will work closely with researchers and engineers to optimize communication libraries and runtime systems, accelerating state‑of‑the‑art AI workloads.

The role emphasizes collaboration with AI frameworks and platform teams, development of new hardware/software co‑designs for GPUs/DPU interconnects, and refining

Qualifikationen

• PhD or equivalent in computer science, computer engineering, or closely related field.
• 5+ years in systems programming, parallel or distributed computing, high‑performance networking or large‑scale data movement.
• Strong programming background in C++ and Python; CUDA or GPU programming experience preferred.
• Hands‑on experience with AI frameworks (PyTorch, TensorFlow, JAX) and knowledge of communication libraries for large‑scale training.

Aufgaben

• Build and evolve scalable software architectures for distributed AI training and inference across clusters.
• Develop and evaluate high-throughput, low-latency communication and runtime capabilities in NCCL, UCX, and UCC.
• Collaborate with AI framework teams and internal platforms to improve end‑to‑end performance and reliability.
• Work on hardware and system‑level features for GPUs, DPUs, and interconnects to speed data movement.
• Advance runtime systems and protocols to enable scalable training and inference at scale.

Kenntnisse

C++

Python

CUDA

Distributed systems

Networking

Ausbildung

PhD or equivalent in CS/EE

Tools

NCCL

UCX

UCC

TensorFlow

PyTorch

CUDA

Jobbeschreibung

NVIDIA Corporation seeks a Senior HPC and AI Network Software Architect to design and implement scalable software for distributed AI training and inference across large GPU clusters. You will work closely with researchers and engineers to optimize communication libraries and runtime systems, accelerating state‑of‑the‑art AI workloads.

The role emphasizes collaboration with AI frameworks and platform teams, development of new hardware/software co‑designs for GPUs/DPU interconnects, and refining