Radiation-Tolerant ASIC Designer (RISC-V)

Big Science Sweden; Genf; Hybrid; CHF 110.000 - 140.000; Vollzeit

Zusammenfassung

CERN invites applications for a role in the EP-ESE-ME section to develop a radiation-tolerant microcontroller ASIC for detectors and accelerator systems. The position covers the full development cycle, from requirements to post-silicon validation, within the CERN SOCRATES framework.

Applicants should have a master’s degree with 2–6 years experience or a PhD with up to 3 years. Nationalities constrained by CERN policy apply. On-site in Geneva.

Qualifikationen

• Master’s degree in electrical engineering or related field plus 2–6 years of professional experience, or PhD with up to 3 years of experience.
• Experience in radiation-tolerant ASIC/SoC design is highly desirable.
• Proven ability to contribute across the full development cycle: requirements through tapeout.

Aufgaben

• Define technical specifications for the microcontroller ASIC based on application requirements across CERN systems.
• Contribute to architecture, design, and validation of a radiation-tolerant MCU ASIC implemented in 65 nm or 28 nm CMOS.
• Support SoC architecture and selection/configuration of a RISC-V core.
• Design, integrate, and validate peripheral IP blocks within the CERN SOCRATES framework.
• Apply fault-tolerant methods including TMR and SEU mitigation.
• Participate in RTL development, verification, and physical implementation from tapeout to post-silicon validation.

Kenntnisse

Radiation-tolerant ASIC design

RISC-V architecture

Fault-tolerant design

RTL verification

Post-silicon validation

Ausbildung

Master’s degree in Electrical Engineering

PhD in a relevant field

Tools

Verilog/SystemVerilog

Cadence/Synopsys tools

RTL design and verification tools

Jobbeschreibung

CERN invites applications for a role in the EP-ESE-ME section to develop a radiation-tolerant microcontroller ASIC for detectors and accelerator systems. The position covers the full development cycle, from requirements to post-silicon validation, within the CERN SOCRATES framework.

Applicants should have a master’s degree with 2–6 years experience or a PhD with up to 3 years. Nationalities constrained by CERN policy apply. On-site in Geneva.