Low-Power ADC Chip Designer for Pixel Readouts

Jobup; Villigen; Vor Ort; CHF 110.000 - 140.000; Vollzeit

Zusammenfassung

Paul Scherrer Institute in Villigen, Switzerland, invites applications for a position designing low-area, low-power ADCs for next-generation pixel readout chips used in XFEL and synchrotron facilities. You will participate in design, testing, and calibration, contributing to prototype and full-scale chips in a collaborative, English-speaking environment.

The role requires a Master's or PhD in Electronics or Physics with hands-on analogue IC design experience and a strong drive to innovate in

Qualifikationen

• Master's or PhD in Electronics, Physics, or related field with chip design experience.
• Experience in analogue IC design, ideally for hybrid pixel detectors and ADCs.
• Knowledge of ASIC testing and data analysis and interpretation.
• Strong communication skills in a collaborative, English-speaking research environment.
• Motivation to contribute new ideas and take initiative in innovative projects.

Aufgaben

• Design and develop a family of low-area, low-power ADCs for readout chips.
• Contribute to design, testing, and characterization of prototype and full-scale readout chips.
• Explore and optimize ADC performance before and after tape-out.
• Develop fast, accurate calibration schemes for ADC systems.
• Collaborate on integration of ADCs into chip and system architectures.
• Support development of high-performance readout solutions for photon science facilities.

Kenntnisse

Analogue IC design

Chip design experience

ASIC testing

Data analysis

English communication

Ausbildung

Master's or PhD in Electronics/Physics

Jobbeschreibung

Paul Scherrer Institute in Villigen, Switzerland, invites applications for a position designing low-area, low-power ADCs for next-generation pixel readout chips used in XFEL and synchrotron facilities. You will participate in design, testing, and calibration, contributing to prototype and full-scale chips in a collaborative, English-speaking environment.

The role requires a Master's or PhD in Electronics or Physics with hands-on analogue IC design experience and a strong drive to innovate in