Verification Engineer - Senior (CAN)

ObjectWin Technology; Markham; On-site; CAD 80,000 - 120,000; Full time

Job summary

Join a forward-thinking company as a Verification Engineer, where you'll engage with cutting-edge digital design and verification concepts. Collaborate with architects and designers to ensure functional, performance, and power verification closure on various digital design blocks. Your expertise in Verilog, SystemVerilog, and UVM will be vital in developing test plans and executing verification strategies. This role offers the chance to work on complex SoC designs, enhancing your skills in a dynamic environment. If you're passionate about modern processor architecture and eager to drive innovative projects, this opportunity is perfect for you.

Qualifications

• 5+ years of verification experience on large ASIC development projects.
• Solid understanding of Computer Architecture and Digital Design concepts.
• Experience with UVM, OVM, or equivalent verification methodologies.

Responsibilities

• Achieve verification closure within project schedules.
• Develop and execute test and coverage plans for completeness.
• Create, reuse, and debug testbenches and verification components.

Skills

Verilog

SystemVerilog

C/C++/OOP

UVM

Constrained Random Verification

Functional Coverage

Scripting (Perl, Tcl, Ruby, Bash, Python)

Analytical Skills

Communication Skills

Education

Bachelor's degree in Computer Engineering

Master's degree in Computer Science

Master's degree in Electrical Engineering

Tools

Synopsys VCS

VC Formal

DVE

Verdi

GDB

Job description

Description:

Location:

Markham, ON.

THE ROLE:

As a member of the verification team, you will work with leading industry tools and design & verification concepts to achieve full functional, performance & power verification closure on a variety of digital design blocks that are part of the Graphics Core IP (GFXIP). You will collaborate closely with architects, designers, and other verification engineers to author test plans for pre-silicon verification, develop testbenches to exercise the design, and write detailed test plans to cover new blocks and features, driving the development of test cases and cover points or assertions to achieve verification closure.

THE PERSON:

Beyond a passion for modern, complex processor architecture, digital design, and verification, the following personal qualities are essential for success in this role:

• Excellent analytical and organizational skills
• Outstanding verbal & written communication
• A self-starter who excels at driving tasks to completion and enabling collaboration amongst team members

KEY RESPONSIBILITIES:

1. Work closely with architects, RTL designers, and verification engineers to achieve verification closure within project schedules
2. Be responsible for functional, power, and performance verification of a block, including planning, execution, and closure
3. Develop and execute test and coverage plans to ensure completeness
4. Create, reuse, and debug testbenches, verification components, and tests
5. Adopt evolving verification methodologies to verify increasingly complex SoC designs within aggressive schedules and work within the existing verification infrastructure

EXPERIENCE AND EDUCATION:

• Minimum 5+ years of verification experience on large ASIC development projects
• Solid understanding of Computer Architecture and Digital Design concepts
• Strong background in Verilog, SystemVerilog, C/C++/OOP coding techniques
• Experience with UVM, OVM, or equivalent
• Experience with constrained random verification, functional coverage, and assertions
• Experience with formal verification is a plus
• Familiarity with scripting languages such as Perl, Tcl, Ruby, Bash, or Python
• Experience with industry-standard tools like Synopsys VCS, VC Formal, DVE, Verdi, GDB, or equivalents
• Strong analytical skills and attention to detail
• Bachelor's or Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related fields