Sr. Staff/Principal ASIC Design Architect – Display Peripherals

Qualcomm; Markham; On-site; CAD 125,000 - 150,000; Full time

Job summary

An established industry player is seeking a Sr. Staff/Principal Design Architect to lead innovative Display IP architecture. This role involves driving the design and verification of ASICs, ensuring high standards across mobile and automotive applications. You will leverage your extensive experience in ASIC design, particularly in display technologies, to define architecture standards and collaborate with cross-functional teams. Join a forward-thinking company that values innovation and teamwork, where your contributions will help shape the future of connected experiences. If you are passionate about technology and eager to make an impact, this opportunity is for you.

Qualifications

• 8+ years of experience in ASIC design and verification required.
• Extensive knowledge of display technologies and bus design.

Responsibilities

• Own end-to-end system architecture and oversee ASIC development.
• Collaborate with design teams and provide technical expertise.

Skills

ASIC RTL design

display technologies (DisplayPort, HDMI, MIPI DSI)

problem solving

technical documentation

communication skills

team collaboration

Education

Bachelor's degree in Science or Engineering

Master's degree in Science or Engineering

PhD in Science or Engineering

Tools

Cadence

RTL Compiler

Job description

Company:

Qualcomm Canada ULC

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

A leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all.

As Sr.Staff/Principal Design Architect for this Display IP, you will be responsible for architecture standards and peripherals design across a broad range of mobile, XR, compute, and automotive use cases. You will:

• Own end to end system architecture
• Determine architecture standards
• Oversee definition, design, verification, and documentation for ASIC development.
• Define module interfaces/formats for simulation.
• Evaluate all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use.
• Analyze equipment to establish operation data, conducts experimental tests, and evaluates results.
• Provide technical expertise for next generation initiatives.
• Collaborate, review and enable design and system teams to execute on dependent specifications
• Post-silicon commercialization support and customer engineering documentation
• Defining and patenting novel architectures that drive industry leadership.
• Use tools/applications (i.e., Cadence, RTL Compiler, etc.) to execute advanced architecture and design of multiple complex blocks and makes suggestions for design protocol.
• Utilize advanced problem solving and ASIC engineering practices to resolve complex architecture, design, or verification problems.
• Own the design and verification strategies of ASICs, SoC, and IP cores.
• Maintain regular communication with key team members to ensure continued alignment between team deliverables and product execution plan.
• Write technical documentation and provides technical expertise for design or project reviews and project meetings to ensure team's best interest is represented.
• Act as a tech lead on small to large projects and owns team deliverables of the project.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience.
• OR Master's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work experience.
• OR PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.

Requirements:

• 8+ years of experience in ASIC RTL design with a concentration in display (CDC, FIFOs implementation, Bus implementation/verification techniques, Memory selection and control, High speed and low power design optimization, Bus interface protocols, etc).
• Extensive Knowledge of display technologies used in peripherals such as DisplayPort, HDMI and/or MIPI DSI

Preferred Qualifications:

• Master’s or PhD degree in Computer Engineering or Computer Science with a significant research component and foundation in VLSI concepts.
• 15+ years ASIC design, verification, or related work experience.
• 10+ years experience with computer architecture and design tools.
• 10+ years experience with bus design and/or cache, memory controllers, low power design
• Knowledge of peripheral interface standards such as VESA DisplayPort, DSC, MIPI, HDCP, USB, PCIE, FPDLink, GMSL, GVIF, APIX, ML, MLE, IEEE 820.3dm, IEEE1722, CTA
• Multimedia architectures for display
• Experience with embedded software development, including Agile Embedded software methodologies and processes.
• Experience managing SW development teams (directly or matrixed)
• Comfortable making technical and business presentations to a wide range of audiences, including to senior management.
• Ability to independently drive activities/project with internal and external cross-functional teams
• Effective written/verbal communication and presentation skills
• Highly motivated team player who possesses outstanding analytical skills
• Global market experience