SLT System Engineer

Tenstorrent; Ontario; Hybrid; USD 100,000 - 500,000; Full time

Job summary

Tenstorrent is seeking engineers for silicon validation and debug teams, pivotal for ensuring product quality in AI technology solutions. Ideal candidates have a degree in Electrical or Computer Engineering and substantial experience in chip validation, offering a competitive compensation package based on qualifications.

Qualifications

• 5+ years of experience in silicon bring-up and debug.
• Strong hands-on experience in silicon debug and validation.
• Experience with high-speed peripheral validation (e.g., Ethernet, PCIe).

Responsibilities

• Develop SLT solutions to test complex, high-power chips.
• Validate proper operating margins at SLT.
• Develop functional tests and workloads in software.

Skills

C/C++

Python

Debugging tools

Problem-solving

Education

Bachelor’s or Master’s in Electrical or Computer Engineering

Tools

JTAG

Protocol analyzers

Job description

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

At Tenstorrent, we're building cutting-edge AI compute solutions, and validating theperformance and functionality of our silicon is a critical part of delivering exceptionalproducts. We are looking for engineers to join our post-Silicon debug and SLT validationteams. These engineers will work closely with our validation, design, verification, DFT,system engineering, and software teams to ensure that our chips and products meet thehighest standards of quality and performance.

This role offers in-office or hybrid work based out of sites in any of Toronto, Canada,Santa Clara, California, Austin Texas, or Fort Collins Colorado.

Responsibilities:

• Develop SLT solutions (System Level Test) to test complex, high-power chips,screen out defects, and ensure quality parts are delivered downstream to systemand board builds.
• Validate proper operating margins at SLT for high-speed SerDes IOs, memoryinterfaces, and core/chip internal functions of cutting-edge AI products.
• Perform electrical characterization to determine process, voltage, frequency, andtemperature operating margins.
• Develop functional tests and workloads in software to exercise the parts andachieve low escape rate and DPPM rates. Interface with System Engineeringand software teams to create this content.
• Deploy these tests and systems at a contract manufacturer for volume testing.
• Develop and maintain test cases and automation scripts.
• Debug issues using industry-standard tools (e.g., JTAG, protocol analyzers), andwork with cross-functional teams to resolve them.
• Document test results and maintain database of results. Track issues with metrics and analytics and provide regular updates and reports to stakeholders.
• Ensure coverage and quality aligns with product requirements and customer use cases and contribute feedback to design and architecture teams.
• Maintain and improve SLT infrastructure to support long-term project needs and scale to a broadening product portfolio over time.

Experience & Qualifications:

• Bachelor’s or Master’s in Electrical or Computer Engineering (or related field) and5+ years of experience in silicon bring-up and debug, chip design, systemsdesign, or a similar technical area.
• Strong hands-on experience in silicon debug and validation, with a solidunderstanding of digital logic, system-level behaviors, and debug methods.
• Proficiency in C/C++, Python, and shell scripting for test development,automation, and debugging.
• Experience with pre-silicon (design, DFT, DFD) and post-silicon (lab testing,bring-up) validation.
• Hands-on experience using debugging tools like JTAG, protocol analyzers, logicanalyzers, and other industry-standard hardware/software tools.
• Strong problem-solving skills and the ability to work effectively in a fast-paced, collaborative environment.
• Experience with high-speed peripheral validation (e.g., Ethernet, PCIe, DRAM).
• Exposure to RTL design and verification methodologies (e.g., SystemVerilog,UVM).
• Experience working with multi-die chiplets or high-speed interconnects isadvantageous.
• Understanding of DFT as well as ATE (Automated Test Equipment) screeningprocesses and silicon electrical characterization.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set by the U.S. government.

Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject toU.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee informationand/or documentation will be required and considered as Tenstorrent moves through the employment process.

If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government. If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.

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