Senior Technical Staff Engineer - Software Development (System Architecture (Memory Interconnect)

FHLB Des Moines; Golden Horseshoe; On-site; USD 107,000 - 226,000; Full time

Job summary

Join a pioneering company in the FPGA industry as a Senior Technical Staff Engineer. In this role, you will lead innovative projects focusing on memory interconnect architecture, collaborating with cross-functional teams to integrate high-performance IP into cutting-edge FPGA solutions. With a commitment to employee development and a diverse workplace, this position offers an exciting opportunity to make a significant impact in various applications including machine learning and industrial automation. If you have extensive experience in ASIC and FPGA development, this is the perfect opportunity to advance your career in a dynamic environment.

Benefits

Health benefits from day one

Retirement plans

Stock units

Bonuses

Qualifications

• 15+ years of industrial experience in FPGA and ASIC development.
• Proven experience in high-performance IP integration.

Responsibilities

• Lead cross-functional teams for IP integration into FPGA products.
• Design architecture for high-speed interconnects and manage engineering teams.

Skills

ASIC & FPGA IP development

System-level performance modeling

Scripting in Perl

Scripting in Python

Scripting in Tcl

Education

MSc or higher in EE

MSc or higher in CS

MSc or higher in CE

Tools

Synopsys ASIC flows

Cadence ASIC flows

Job description

Senior Technical Staff Engineer - Software Development (System Architecture (Memory Interconnect)

Senior Technical Staff Engineer - Software Development (System Architecture (Memory Interconnect)

Apply locations: Canada - Toronto - 67 Yonge Street (10th Floor)

Time type: Full time

Posted on: Posted Yesterday

Job requisition id: R417-25

About the Role

Microchip Technology FPGA Business group is seeking a highly skilled and experienced Memory Interconnect System Architect to join our dynamic team. The successful candidate will lead cross-functional teams to deliver high-performance IP integrations into our FPGA products, meeting market and customer requirements across various applications.

Company Overview

Microchip is a major supplier of low-power, reliable FPGAs used in embedded vision, digital signal processing, machine learning, industrial, medical, and satellite applications. We are pioneers in embedding RISC-V processors in FPGAs and are committed to employee development and a diverse, inclusive workplace.

Key Responsibilities

1. Lead cross-functional teams for high-performance IP integration into FPGA products.
2. Design and implement architecture for high-speed, low-voltage interconnects supporting protocols like LP/DDR, LVDS, MIPI.
3. Understand customer use cases and integrate IP accordingly.
4. Collaborate with architects, designers, and implementation teams.
5. Manage and mentor engineering team members.

Requirements

1. Proven experience in ASIC & FPGA IP development, integration, and deployment.
2. Knowledge of system-level performance modeling (TLM/SystemC).
3. Experience with Synopsys & Cadence ASIC flows.
4. Scripting skills in Perl, Python, Tcl are advantageous.
5. MSc or higher in EE, CS, CE or related disciplines.
6. 15+ years of industrial experience.

Additional Information

Travel: 0-25%

Salary Range: $107,000 - $226,000, depending on skills and experience.

Benefits include health benefits from day one, retirement plans, stock units, and bonuses. More details available on our benefits page.

Accommodation

We support accessibility and will provide accommodations during the hiring process. Contact us at [e-mail] for assistance.

Note to Agencies

Microchip does not accept unsolicited resumes from agencies and is not responsible for fees related to such submissions.